diff --git a/shared/test/unit_test/xe2_hpg_core/test_device_caps_xe2_hpg_core.cpp b/shared/test/unit_test/xe2_hpg_core/test_device_caps_xe2_hpg_core.cpp
index 6f7592ace1..c8527a5572 100644
--- a/shared/test/unit_test/xe2_hpg_core/test_device_caps_xe2_hpg_core.cpp
+++ b/shared/test/unit_test/xe2_hpg_core/test_device_caps_xe2_hpg_core.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2024 Intel Corporation
+ * Copyright (C) 2024-2025 Intel Corporation
  *
  * SPDX-License-Identifier: MIT
  *
@@ -40,7 +40,7 @@ XE2_HPG_CORETEST_F(Xe2HpgCoreDeviceCaps, givenXe2HpgCoreWhenCheckingCxlTypeThenR
     EXPECT_EQ(0u, pDevice->getHardwareInfo().capabilityTable.cxlType);
 }
 
-XE2_HPG_CORETEST_F(Xe2HpgCoreDeviceCaps, givenXe2HpgCoreWhenCheckingDefaltPreemptionModeThenDefaultPreemptionModeIsMidThread) {
+XE2_HPG_CORETEST_F(Xe2HpgCoreDeviceCaps, givenXe2HpgCoreWhenCheckingDefaultPreemptionModeThenDefaultPreemptionModeIsMidThread) {
     EXPECT_EQ(PreemptionMode::MidThread, pDevice->getHardwareInfo().capabilityTable.defaultPreemptionMode);
 }
 
diff --git a/shared/test/unit_test/xe3_core/test_device_caps_xe3_core.cpp b/shared/test/unit_test/xe3_core/test_device_caps_xe3_core.cpp
index 46ca847baf..58cbf3e3b3 100644
--- a/shared/test/unit_test/xe3_core/test_device_caps_xe3_core.cpp
+++ b/shared/test/unit_test/xe3_core/test_device_caps_xe3_core.cpp
@@ -52,7 +52,7 @@ XE3_CORETEST_F(Xe3CoreDeviceCaps, givenXe3CoreWhenCheckingCxlTypeThenReturnZero)
     EXPECT_EQ(0u, pDevice->getHardwareInfo().capabilityTable.cxlType);
 }
 
-XE3_CORETEST_F(Xe3CoreDeviceCaps, givenXe3CoreWhenCheckingDefaltPreemptionModeThenDefaultPreemptionModeIsMidThread) {
+XE3_CORETEST_F(Xe3CoreDeviceCaps, givenXe3CoreWhenCheckingDefaultPreemptionModeThenDefaultPreemptionModeIsMidThread) {
     EXPECT_EQ(PreemptionMode::MidThread, pDevice->getHardwareInfo().capabilityTable.defaultPreemptionMode);
 }