Add support for 32 GTs pci link speed and 0 power_min_limit

Related-To: LOCI-2489, LOCI-2488

Signed-off-by: Mayank Raghuwanshi <mayank.raghuwanshi@intel.com>
This commit is contained in:
Mayank Raghuwanshi
2021-08-15 23:19:32 +05:30
committed by Compute-Runtime-Automation
parent f727d26aa0
commit d2014b2869
5 changed files with 28 additions and 4 deletions

View File

@@ -25,7 +25,7 @@ namespace L0 {
//
int64_t convertPcieSpeedFromGTsToBs(double maxLinkSpeedInGt) {
double pcieSpeedWithEnc;
if ((maxLinkSpeedInGt == PciLinkSpeeds::Pci16_0GigatransfersPerSecond) || (maxLinkSpeedInGt == PciLinkSpeeds::Pci8_0GigatransfersPerSecond)) {
if ((maxLinkSpeedInGt == PciLinkSpeeds::Pci32_0GigatransfersPerSecond) || (maxLinkSpeedInGt == PciLinkSpeeds::Pci16_0GigatransfersPerSecond) || (maxLinkSpeedInGt == PciLinkSpeeds::Pci8_0GigatransfersPerSecond)) {
pcieSpeedWithEnc = maxLinkSpeedInGt * 1000 * 128 / 130;
} else if ((maxLinkSpeedInGt == PciLinkSpeeds::Pci5_0GigatransfersPerSecond) || (maxLinkSpeedInGt == PciLinkSpeeds::Pci2_5GigatransfersPerSecond)) {
pcieSpeedWithEnc = maxLinkSpeedInGt * 1000 * 8 / 10;