From d9aae805c7a344f9b2687f9bbc2c105837f3c752 Mon Sep 17 00:00:00 2001 From: Igor Venevtsev Date: Wed, 5 Jan 2022 12:06:14 +0000 Subject: [PATCH] Do not apply L0 debugger WA (Disable L3 cache) for highest DG2 steppings Related-To: NEO-6320 Signed-off-by: Igor Venevtsev --- .../core/source/debugger/debugger_l0.cpp | 4 +-- .../unit_test/helpers/hw_helper_tests.cpp | 8 +++--- .../xe_hpg_core/dg2/hw_helper_tests_dg2.cpp | 26 +++++++++++++++++-- shared/source/device/device.cpp | 2 +- shared/source/helpers/hw_helper.h | 6 ++--- shared/source/helpers/hw_helper_base.inl | 4 +-- .../xe_hp_core/hw_helper_xe_hp_core.cpp | 4 +-- .../xe_hpg_core/hw_helper_xe_hpg_core.cpp | 6 ++--- 8 files changed, 41 insertions(+), 19 deletions(-) diff --git a/level_zero/core/source/debugger/debugger_l0.cpp b/level_zero/core/source/debugger/debugger_l0.cpp index 1ce98bf56f..839ba27c9d 100644 --- a/level_zero/core/source/debugger/debugger_l0.cpp +++ b/level_zero/core/source/debugger/debugger_l0.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2020-2021 Intel Corporation + * Copyright (C) 2020-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -78,7 +78,7 @@ void DebuggerL0::initialize() { NEO::MemoryTransferHelper::transferMemoryToAllocation(hwHelper.isBlitCopyRequiredForLocalMemory(hwInfo, *moduleDebugArea), *device, moduleDebugArea, 0, &debugArea, sizeof(DebugAreaHeader)); - if (hwHelper.disableL3CacheForDebug()) { + if (hwHelper.disableL3CacheForDebug(hwInfo)) { device->getGmmHelper()->disableL3CacheForDebug(); } } diff --git a/opencl/test/unit_test/helpers/hw_helper_tests.cpp b/opencl/test/unit_test/helpers/hw_helper_tests.cpp index 0138da8f7e..ffb298a30a 100644 --- a/opencl/test/unit_test/helpers/hw_helper_tests.cpp +++ b/opencl/test/unit_test/helpers/hw_helper_tests.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2018-2021 Intel Corporation + * Copyright (C) 2018-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -1408,13 +1408,13 @@ TEST(HwHelperTests, whenBlitterSupportIsDisabledThenDontExposeAnyBcsEngine) { using NotATSOrDG2 = AreNotGfxCores; HWTEST2_F(HwHelperTest, givenNotAtsOrDg2WhenDisableL3ForDebugCalledThenFalseIsReturned, NotATSOrDG2) { const auto &hwHelper = HwHelper::get(renderCoreFamily); - EXPECT_FALSE(hwHelper.disableL3CacheForDebug()); + EXPECT_FALSE(hwHelper.disableL3CacheForDebug(*defaultHwInfo)); } using ATSOrDG2 = IsWithinGfxCore; HWTEST2_F(HwHelperTest, givenAtsOrDg2WhenDisableL3ForDebugCalledThenTrueIsReturned, ATSOrDG2) { const auto &hwHelper = HwHelper::get(renderCoreFamily); - EXPECT_TRUE(hwHelper.disableL3CacheForDebug()); + EXPECT_TRUE(hwHelper.disableL3CacheForDebug(*defaultHwInfo)); } HWTEST_F(HwHelperTest, givenHwHelperWhenGettingIfRevisionSpecificBinaryBuiltinIsRequiredThenFalseIsReturned) { @@ -1448,4 +1448,4 @@ HWTEST2_F(HwHelperTest, givenHwInfoConfigWhenCheckingForceNonGpuCoherencyWAThenF const auto &hwHelper = HwHelper::get(renderCoreFamily); EXPECT_FALSE(hwHelper.forceNonGpuCoherencyWA(true)); EXPECT_FALSE(hwHelper.forceNonGpuCoherencyWA(false)); -} \ No newline at end of file +} diff --git a/opencl/test/unit_test/xe_hpg_core/dg2/hw_helper_tests_dg2.cpp b/opencl/test/unit_test/xe_hpg_core/dg2/hw_helper_tests_dg2.cpp index 0ad332cac5..5e77134ac1 100644 --- a/opencl/test/unit_test/xe_hpg_core/dg2/hw_helper_tests_dg2.cpp +++ b/opencl/test/unit_test/xe_hpg_core/dg2/hw_helper_tests_dg2.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -74,6 +74,28 @@ DG2TEST_F(HwHelperTestsDg2, givenRevisionEnumAndPlatformFamilyTypeThenProperValu } } +DG2TEST_F(HwHelperTestsDg2, givenRevisionEnumAndDisableL3CacheForDebugCalledThenCorrectValueIsReturned) { + uint32_t steppings[] = { + REVISION_A0, + REVISION_A1, + REVISION_B, + REVISION_C, + CommonConstants::invalidStepping, + }; + + const auto &hwHelper = HwHelper::get(hardwareInfo.platform.eRenderCoreFamily); + const auto &hwInfoConfig = *HwInfoConfig::get(hardwareInfo.platform.eProductFamily); + + for (auto stepping : steppings) { + hardwareInfo.platform.usRevId = hwInfoConfig.getHwRevIdFromStepping(stepping, hardwareInfo); + if (stepping < REVISION_B) { + EXPECT_TRUE(hwHelper.disableL3CacheForDebug(hardwareInfo)); + } else { + EXPECT_FALSE(hwHelper.disableL3CacheForDebug(hardwareInfo)); + } + } +} + DG2TEST_F(HwHelperTestsDg2, givenDg2WhenSetForceNonCoherentThenProperFlagSet) { using FORCE_NON_COHERENT = typename FamilyType::STATE_COMPUTE_MODE::FORCE_NON_COHERENT; @@ -127,4 +149,4 @@ DG2TEST_F(HwHelperTestsDg2, givenNotEnabledSliceWhenComputeUnitsUsedForScratchTh auto &hwHelper = HwHelper::get(hwInfo.platform.eRenderCoreFamily); EXPECT_THROW(hwHelper.getComputeUnitsUsedForScratch(&hwInfo), std::exception); -} \ No newline at end of file +} diff --git a/shared/source/device/device.cpp b/shared/source/device/device.cpp index e0ffb82209..7b9f40e1a4 100644 --- a/shared/source/device/device.cpp +++ b/shared/source/device/device.cpp @@ -219,7 +219,7 @@ bool Device::createDeviceImpl() { } auto &hwHelper = HwHelper::get(hwInfo.platform.eRenderCoreFamily); - if (getDebugger() && hwHelper.disableL3CacheForDebug()) { + if (getDebugger() && hwHelper.disableL3CacheForDebug(hwInfo)) { getGmmHelper()->disableL3CacheForDebug(); } diff --git a/shared/source/helpers/hw_helper.h b/shared/source/helpers/hw_helper.h index 0e4474ef8e..1e928e59eb 100644 --- a/shared/source/helpers/hw_helper.h +++ b/shared/source/helpers/hw_helper.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2018-2021 Intel Corporation + * Copyright (C) 2018-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -151,7 +151,7 @@ class HwHelper { virtual uint64_t getMaxMemAllocSize() const = 0; virtual bool isStatelesToStatefullWithOffsetSupported() const = 0; virtual void encodeBufferSurfaceState(EncodeSurfaceStateArgs &args) = 0; - virtual bool disableL3CacheForDebug() const = 0; + virtual bool disableL3CacheForDebug(const HardwareInfo &hwInfo) const = 0; virtual bool isRevisionSpecificBinaryBuiltinRequired() const = 0; virtual bool forceNonGpuCoherencyWA(bool requiresCoherency) const = 0; @@ -387,7 +387,7 @@ class HwHelperHw : public HwHelper { uint64_t getMaxMemAllocSize() const override; bool isStatelesToStatefullWithOffsetSupported() const override; void encodeBufferSurfaceState(EncodeSurfaceStateArgs &args) override; - bool disableL3CacheForDebug() const override; + bool disableL3CacheForDebug(const HardwareInfo &hwInfo) const override; bool isRevisionSpecificBinaryBuiltinRequired() const override; bool forceNonGpuCoherencyWA(bool requiresCoherency) const override; diff --git a/shared/source/helpers/hw_helper_base.inl b/shared/source/helpers/hw_helper_base.inl index c467e83cad..5f270e579a 100644 --- a/shared/source/helpers/hw_helper_base.inl +++ b/shared/source/helpers/hw_helper_base.inl @@ -1,5 +1,5 @@ /* - * Copyright (C) 2019-2021 Intel Corporation + * Copyright (C) 2019-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -702,7 +702,7 @@ void HwHelperHw::encodeBufferSurfaceState(EncodeSurfaceStateArgs &arg } template -bool HwHelperHw::disableL3CacheForDebug() const { +bool HwHelperHw::disableL3CacheForDebug(const HardwareInfo &) const { return false; } template diff --git a/shared/source/xe_hp_core/hw_helper_xe_hp_core.cpp b/shared/source/xe_hp_core/hw_helper_xe_hp_core.cpp index e9687e2ecc..162d8dd3c4 100644 --- a/shared/source/xe_hp_core/hw_helper_xe_hp_core.cpp +++ b/shared/source/xe_hp_core/hw_helper_xe_hp_core.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -155,7 +155,7 @@ uint32_t HwHelperHw::getDefaultRevisionId(const HardwareInfo &hwInfo) co } template <> -bool HwHelperHw::disableL3CacheForDebug() const { +bool HwHelperHw::disableL3CacheForDebug(const HardwareInfo &) const { return true; } diff --git a/shared/source/xe_hpg_core/hw_helper_xe_hpg_core.cpp b/shared/source/xe_hpg_core/hw_helper_xe_hpg_core.cpp index 4308adbe18..99a1b15909 100644 --- a/shared/source/xe_hpg_core/hw_helper_xe_hpg_core.cpp +++ b/shared/source/xe_hpg_core/hw_helper_xe_hpg_core.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -114,8 +114,8 @@ uint32_t HwHelperHw::computeSlmValues(const HardwareInfo &hwInfo, uint32 } template <> -bool HwHelperHw::disableL3CacheForDebug() const { - return true; +bool HwHelperHw::disableL3CacheForDebug(const HardwareInfo &hwInfo) const { + return isWorkaroundRequired(REVISION_A0, REVISION_B, hwInfo); } template class HwHelperHw;