From da779d067f96a9e2618e69f005d87383ef6f2656 Mon Sep 17 00:00:00 2001
From: Young Jin Yoon <young.jin.yoon@intel.com>
Date: Tue, 24 Nov 2020 19:15:37 -0800
Subject: [PATCH] Support the AND operation in EncodeMathMMIO

Related-to: LOCI-1161
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
---
 .../command_container/command_encoder.h       |  5 +++
 .../command_container/command_encoder.inl     |  8 ++++
 .../unit_test/encoders/test_encode_math.cpp   | 41 +++++++++++++++++++
 3 files changed, 54 insertions(+)

diff --git a/shared/source/command_container/command_encoder.h b/shared/source/command_container/command_encoder.h
index e768b34871..e4d06a4071 100644
--- a/shared/source/command_container/command_encoder.h
+++ b/shared/source/command_container/command_encoder.h
@@ -136,6 +136,11 @@ struct EncodeMathMMIO {
                              AluRegisters firstOperandRegister,
                              AluRegisters secondOperandRegister,
                              AluRegisters finalResultRegister);
+
+    static void encodeAluAnd(MI_MATH_ALU_INST_INLINE *pAluParam,
+                             AluRegisters firstOperandRegister,
+                             AluRegisters secondOperandRegister,
+                             AluRegisters finalResultRegister);
 };
 
 template <typename GfxFamily>
diff --git a/shared/source/command_container/command_encoder.inl b/shared/source/command_container/command_encoder.inl
index 2447b2f2d2..3e4b2a6c1d 100644
--- a/shared/source/command_container/command_encoder.inl
+++ b/shared/source/command_container/command_encoder.inl
@@ -208,6 +208,14 @@ void EncodeMathMMIO<Family>::encodeAluSubStoreCarry(MI_MATH_ALU_INST_INLINE *pAl
     encodeAlu(pAluParam, regA, regB, AluRegisters::OPCODE_SUB, finalResultRegister, AluRegisters::R_CF);
 }
 
+template <typename Family>
+void EncodeMathMMIO<Family>::encodeAluAnd(MI_MATH_ALU_INST_INLINE *pAluParam,
+                                          AluRegisters firstOperandRegister,
+                                          AluRegisters secondOperandRegister,
+                                          AluRegisters finalResultRegister) {
+    encodeAlu(pAluParam, firstOperandRegister, secondOperandRegister, AluRegisters::OPCODE_AND, finalResultRegister, AluRegisters::R_ACCU);
+}
+
 /*
  * greaterThan() tests if firstOperandRegister is greater than
  * secondOperandRegister.
diff --git a/shared/test/unit_test/encoders/test_encode_math.cpp b/shared/test/unit_test/encoders/test_encode_math.cpp
index ce000b709f..5abd067941 100644
--- a/shared/test/unit_test/encoders/test_encode_math.cpp
+++ b/shared/test/unit_test/encoders/test_encode_math.cpp
@@ -99,6 +99,47 @@ HWTEST_F(EncodeMathMMIOTest, encodeAluSubStoreCarryHasCorrectOpcodesOperands) {
     EXPECT_EQ(aluParam[4].DW0.Value, 0u);
 }
 
+HWTEST_F(EncodeMathMMIOTest, givenAluRegistersWhenEncodeAluAndIsCalledThenAluParamHasCorrectOpcodesAndOperands) {
+    using MI_MATH_ALU_INST_INLINE = typename FamilyType::MI_MATH_ALU_INST_INLINE;
+
+    MI_MATH_ALU_INST_INLINE aluParam[5];
+    AluRegisters regA = AluRegisters::R_0;
+    AluRegisters regB = AluRegisters::R_1;
+    AluRegisters finalResultRegister = AluRegisters::R_2;
+
+    memset(aluParam, 0, sizeof(MI_MATH_ALU_INST_INLINE) * 5);
+
+    EncodeMathMMIO<FamilyType>::encodeAluAnd(aluParam, regA, regB,
+                                             finalResultRegister);
+
+    EXPECT_EQ(aluParam[0].DW0.BitField.ALUOpcode,
+              static_cast<uint32_t>(AluRegisters::OPCODE_LOAD));
+    EXPECT_EQ(aluParam[0].DW0.BitField.Operand1,
+              static_cast<uint32_t>(AluRegisters::R_SRCA));
+    EXPECT_EQ(aluParam[0].DW0.BitField.Operand2, static_cast<uint32_t>(regA));
+
+    EXPECT_EQ(aluParam[1].DW0.BitField.ALUOpcode,
+              static_cast<uint32_t>(AluRegisters::OPCODE_LOAD));
+    EXPECT_EQ(aluParam[1].DW0.BitField.Operand1,
+              static_cast<uint32_t>(AluRegisters::R_SRCB));
+    EXPECT_EQ(aluParam[1].DW0.BitField.Operand2,
+              static_cast<uint32_t>(regB));
+
+    EXPECT_EQ(aluParam[2].DW0.BitField.ALUOpcode,
+              static_cast<uint32_t>(AluRegisters::OPCODE_AND));
+    EXPECT_EQ(aluParam[2].DW0.BitField.Operand1, 0u);
+    EXPECT_EQ(aluParam[2].DW0.BitField.Operand2, 0u);
+
+    EXPECT_EQ(aluParam[3].DW0.BitField.ALUOpcode,
+              static_cast<uint32_t>(AluRegisters::OPCODE_STORE));
+    EXPECT_EQ(aluParam[3].DW0.BitField.Operand1,
+              static_cast<uint32_t>(AluRegisters::R_2));
+    EXPECT_EQ(aluParam[3].DW0.BitField.Operand2,
+              static_cast<uint32_t>(AluRegisters::R_ACCU));
+
+    EXPECT_EQ(aluParam[4].DW0.Value, 0u);
+}
+
 using CommandEncoderMathTest = Test<DeviceFixture>;
 
 HWTEST_F(CommandEncoderMathTest, commandReserve) {