diff --git a/level_zero/core/test/unit_tests/fixtures/in_order_cmd_list_fixture.h b/level_zero/core/test/unit_tests/fixtures/in_order_cmd_list_fixture.h index fbfe78a088..d55cabbf1e 100644 --- a/level_zero/core/test/unit_tests/fixtures/in_order_cmd_list_fixture.h +++ b/level_zero/core/test/unit_tests/fixtures/in_order_cmd_list_fixture.h @@ -234,13 +234,15 @@ bool InOrderCmdListFixture::verifyInOrderDependency(GenCmdList::iterator &cmd, u if (!lri) { return false; } + + uint32_t base = (isBcs) ? RegisterOffsets::bcs0Base : 0x0; EXPECT_EQ(getLowPart(counter), lri->getDataDword()); - EXPECT_EQ(RegisterOffsets::csGprR0, lri->getRegisterOffset()); + EXPECT_EQ(RegisterOffsets::csGprR0 + base, lri->getRegisterOffset()); lri++; EXPECT_EQ(getHighPart(counter), lri->getDataDword()); - EXPECT_EQ(RegisterOffsets::csGprR0 + 4, lri->getRegisterOffset()); + EXPECT_EQ(RegisterOffsets::csGprR0 + 4 + base, lri->getRegisterOffset()); std::advance(cmd, 2); } diff --git a/shared/source/helpers/gfx_core_helper_bdw_to_icllp.inl b/shared/source/helpers/gfx_core_helper_bdw_to_icllp.inl index 1d09329634..b8e173c38d 100644 --- a/shared/source/helpers/gfx_core_helper_bdw_to_icllp.inl +++ b/shared/source/helpers/gfx_core_helper_bdw_to_icllp.inl @@ -18,6 +18,7 @@ inline bool GfxCoreHelperHw::isFusedEuDispatchEnabled(const HardwareI template void *LriHelper::program(MI_LOAD_REGISTER_IMM *lriCmd, uint32_t address, uint32_t value, bool remap, bool isBcs) { MI_LOAD_REGISTER_IMM cmd = GfxFamily::cmdInitLoadRegisterImm; + address += (isBcs && remap) ? RegisterOffsets::bcs0Base : 0x0; cmd.setRegisterOffset(address); cmd.setDataDword(value); diff --git a/shared/source/helpers/gfx_core_helper_tgllp_and_later.inl b/shared/source/helpers/gfx_core_helper_tgllp_and_later.inl index e23b6d4c25..a19bf2f93b 100644 --- a/shared/source/helpers/gfx_core_helper_tgllp_and_later.inl +++ b/shared/source/helpers/gfx_core_helper_tgllp_and_later.inl @@ -24,6 +24,7 @@ inline bool GfxCoreHelperHw::isFusedEuDispatchEnabled(const HardwareI template void *LriHelper::program(MI_LOAD_REGISTER_IMM *lriCmd, uint32_t address, uint32_t value, bool remap, bool isBcs) { MI_LOAD_REGISTER_IMM cmd = Family::cmdInitLoadRegisterImm; + address += (isBcs && remap) ? RegisterOffsets::bcs0Base : 0x0; cmd.setRegisterOffset(address); cmd.setDataDword(value); cmd.setMmioRemapEnable(remap); diff --git a/shared/source/helpers/register_offsets.h b/shared/source/helpers/register_offsets.h index 98db37aa98..d60a21375c 100644 --- a/shared/source/helpers/register_offsets.h +++ b/shared/source/helpers/register_offsets.h @@ -40,6 +40,7 @@ inline constexpr uint32_t csGprR11 = 0x2658; inline constexpr uint32_t csGprR12 = 0x2660; inline constexpr uint32_t csGprR13 = 0x2668; inline constexpr uint32_t csGprR14 = 0x2670; +inline constexpr uint32_t bcs0Base = 0x20000; inline constexpr uint32_t csPredicateResult = 0x2418; inline constexpr uint32_t csPredicateResult2 = 0x23BC; diff --git a/shared/test/unit_test/helpers/gfx_core_helper_tests.cpp b/shared/test/unit_test/helpers/gfx_core_helper_tests.cpp index b98a61044e..82c239bfad 100644 --- a/shared/test/unit_test/helpers/gfx_core_helper_tests.cpp +++ b/shared/test/unit_test/helpers/gfx_core_helper_tests.cpp @@ -237,6 +237,69 @@ HWTEST_F(LriHelperTests, givenAddressAndOffsetWhenHelperIsUsedThenProgramCmdStre EXPECT_EQ(data, lri->getDataDword()); } +HWTEST_F(LriHelperTests, givenAddressAndOffsetAndRemapAndNotBlitterWhenHelperIsUsedThenProgramCmdStream) { + using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM; + std::unique_ptr buffer(new uint8_t[128]); + + LinearStream stream(buffer.get(), 128); + uint32_t address = 0x8888; + uint32_t data = 0x1234; + + auto expectedLri = FamilyType::cmdInitLoadRegisterImm; + expectedLri.setRegisterOffset(address); + expectedLri.setDataDword(data); + + LriHelper::program(&stream, address, data, true, false); + auto lri = genCmdCast(stream.getCpuBase()); + ASSERT_NE(nullptr, lri); + + EXPECT_EQ(sizeof(MI_LOAD_REGISTER_IMM), stream.getUsed()); + EXPECT_EQ(address, lri->getRegisterOffset()); + EXPECT_EQ(data, lri->getDataDword()); +} + +HWTEST_F(LriHelperTests, givenAddressAndOffsetAndNotRemapAndBlitterWhenHelperIsUsedThenProgramCmdStream) { + using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM; + std::unique_ptr buffer(new uint8_t[128]); + + LinearStream stream(buffer.get(), 128); + uint32_t address = 0x8888; + uint32_t data = 0x1234; + + auto expectedLri = FamilyType::cmdInitLoadRegisterImm; + expectedLri.setRegisterOffset(address); + expectedLri.setDataDword(data); + + LriHelper::program(&stream, address, data, false, true); + auto lri = genCmdCast(stream.getCpuBase()); + ASSERT_NE(nullptr, lri); + + EXPECT_EQ(sizeof(MI_LOAD_REGISTER_IMM), stream.getUsed()); + EXPECT_EQ(address, lri->getRegisterOffset()); + EXPECT_EQ(data, lri->getDataDword()); +} + +HWTEST_F(LriHelperTests, givenAddressAndOffsetAndRemapAndBlitterWhenHelperIsUsedThenProgramCmdStream) { + using MI_LOAD_REGISTER_IMM = typename FamilyType::MI_LOAD_REGISTER_IMM; + std::unique_ptr buffer(new uint8_t[128]); + + LinearStream stream(buffer.get(), 128); + uint32_t address = 0x8888; + uint32_t data = 0x1234; + + auto expectedLri = FamilyType::cmdInitLoadRegisterImm; + expectedLri.setRegisterOffset(address); + expectedLri.setDataDword(data); + + LriHelper::program(&stream, address, data, true, true); + auto lri = genCmdCast(stream.getCpuBase()); + ASSERT_NE(nullptr, lri); + + EXPECT_EQ(sizeof(MI_LOAD_REGISTER_IMM), stream.getUsed()); + EXPECT_EQ(address + RegisterOffsets::bcs0Base, lri->getRegisterOffset()); + EXPECT_EQ(data, lri->getDataDword()); +} + using PipeControlHelperTests = ::testing::Test; HWTEST_F(PipeControlHelperTests, givenPostSyncWriteTimestampModeWhenHelperIsUsedThenProperFieldsAreProgrammed) {