From e5a18177c5e6d695d7e9e6d210eaa7cb60ed17fc Mon Sep 17 00:00:00 2001 From: Mateusz Jablonski Date: Mon, 17 Jan 2022 12:54:53 +0000 Subject: [PATCH] Add unit test helper function to set pipe control hdc flush Separate unit test helper definitions bdw_and_later / xe_hp_and_later Related-To: NEO-6466 Signed-off-by: Mateusz Jablonski --- .../sources/cmdlist/test_cmdlist_1.cpp | 5 +- ...ceiver_flush_task_tests_xehp_and_later.cpp | 10 +-- ...stream_receiver_hw_tests_dg2_and_later.cpp | 4 +- .../helpers/hw_helper_tests_dg2_and_later.cpp | 10 +-- .../hw_helper_tests_xehp_and_later.cpp | 10 +-- shared/source/gen11/hw_cmds_base.h | 1 + shared/source/gen12lp/hw_cmds_base.h | 1 + shared/source/gen8/hw_cmds_base.h | 1 + shared/source/gen9/hw_cmds_base.h | 1 + shared/source/helpers/hw_helper_base.inl | 4 +- .../helpers/hw_helper_dg2_and_later.inl | 6 +- shared/source/xe_hp_core/hw_cmds_base.h | 1 + shared/source/xe_hpc_core/hw_cmds_base.h | 1 + shared/source/xe_hpg_core/hw_cmds_base.h | 1 + .../common/gen11/unit_test_helper_gen11.cpp | 3 +- .../gen12lp/unit_test_helper_gen12lp.cpp | 3 +- .../common/gen8/unit_test_helper_gen8.cpp | 3 +- .../common/gen9/unit_test_helper_gen9.cpp | 3 +- shared/test/common/helpers/unit_test_helper.h | 4 +- .../test/common/helpers/unit_test_helper.inl | 45 +------------- .../unit_test_helper_bdw_and_later.inl | 62 +++++++++++++++++++ .../unit_test_helper_xehp_and_later.inl | 47 ++++++++------ shared/test/common/libult/CMakeLists.txt | 1 + .../unit_test_helper_xe_hp_core.cpp | 4 +- .../unit_test_helper_xe_hpc_core.cpp | 4 +- .../unit_test_helper_xe_hpg_core.cpp | 4 +- 26 files changed, 142 insertions(+), 97 deletions(-) create mode 100644 shared/test/common/helpers/unit_test_helper_bdw_and_later.inl diff --git a/level_zero/core/test/unit_tests/sources/cmdlist/test_cmdlist_1.cpp b/level_zero/core/test/unit_tests/sources/cmdlist/test_cmdlist_1.cpp index 56d14ff444..30fdb457bb 100644 --- a/level_zero/core/test/unit_tests/sources/cmdlist/test_cmdlist_1.cpp +++ b/level_zero/core/test/unit_tests/sources/cmdlist/test_cmdlist_1.cpp @@ -7,6 +7,7 @@ #include "shared/source/gmm_helper/gmm_helper.h" #include "shared/test/common/cmd_parse/gen_cmd_parse.h" +#include "shared/test/common/helpers/unit_test_helper.h" #include "shared/test/common/mocks/mock_memory_manager.h" #include "shared/test/common/test_macros/test.h" #include "shared/test/unit_test/page_fault_manager/mock_cpu_page_fault_manager.h" @@ -1514,7 +1515,7 @@ HWTEST2_F(CommandListCreate, givenCommandListWhenAppendingBarrierThenPipeControl EXPECT_NE(cmdList.end(), itor); auto pipeControlCmd = reinterpret_cast(*itor); - EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush()); + EXPECT_TRUE(UnitTestHelper::getPipeControlHdcPipelineFlush(*pipeControlCmd)); } HWTEST2_F(CommandListCreate, givenCommandListWhenAppendingBarrierThenPipeControlIsProgrammedWithHdcAndUntypedFlushSet, IsAtLeastXeHpgCore) { @@ -1534,7 +1535,7 @@ HWTEST2_F(CommandListCreate, givenCommandListWhenAppendingBarrierThenPipeControl EXPECT_NE(cmdList.end(), itor); auto pipeControlCmd = reinterpret_cast(*itor); - EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush()); + EXPECT_TRUE(UnitTestHelper::getPipeControlHdcPipelineFlush(*pipeControlCmd)); EXPECT_TRUE(pipeControlCmd->getUnTypedDataPortCacheFlush()); } diff --git a/opencl/test/unit_test/command_stream/command_stream_receiver_flush_task_tests_xehp_and_later.cpp b/opencl/test/unit_test/command_stream/command_stream_receiver_flush_task_tests_xehp_and_later.cpp index 72b90c9164..bdbca63ce2 100644 --- a/opencl/test/unit_test/command_stream/command_stream_receiver_flush_task_tests_xehp_and_later.cpp +++ b/opencl/test/unit_test/command_stream/command_stream_receiver_flush_task_tests_xehp_and_later.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -92,7 +92,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, gi auto pipeControlCmd = reinterpret_cast(*pipeControlItor); EXPECT_TRUE(pipeControlCmd->getTextureCacheInvalidationEnable()); EXPECT_EQ(MemorySynchronizationCommands::getDcFlushEnable(true, *defaultHwInfo), pipeControlCmd->getDcFlushEnable()); - EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush()); + EXPECT_TRUE(UnitTestHelper::getPipeControlHdcPipelineFlush(*pipeControlCmd)); } HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, givenProgramPipeControlPriorToNonPipelinedStateCommandDebugKeyAndStateBaseAddressWhenItIsRequiredThenThereIsPipeControlPriorToIt) { @@ -111,14 +111,14 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, gi auto pipeControlItor = find(cmdList.begin(), stateBaseAddressItor); EXPECT_NE(stateBaseAddressItor, pipeControlItor); auto pipeControlCmd = reinterpret_cast(*pipeControlItor); - EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush()); + EXPECT_TRUE(UnitTestHelper::getPipeControlHdcPipelineFlush(*pipeControlCmd)); EXPECT_TRUE(pipeControlCmd->getAmfsFlushEnable()); EXPECT_TRUE(pipeControlCmd->getCommandStreamerStallEnable()); EXPECT_TRUE(pipeControlCmd->getInstructionCacheInvalidateEnable()); EXPECT_TRUE(pipeControlCmd->getTextureCacheInvalidationEnable()); EXPECT_TRUE(pipeControlCmd->getConstantCacheInvalidationEnable()); EXPECT_TRUE(pipeControlCmd->getStateCacheInvalidationEnable()); - EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush()); + EXPECT_TRUE(UnitTestHelper::getPipeControlHdcPipelineFlush(*pipeControlCmd)); } HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, givenProgramPipeControlPriorToNonPipelinedStateCommandDebugKeyAndStateSipWhenItIsRequiredThenThereIsPipeControlPriorToIt) { @@ -144,7 +144,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, gi auto pipeControlIterator = find(cmdList.begin(), cmdList.end()); auto pipeControlCmd = genCmdCast(*pipeControlIterator); - EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush()); + EXPECT_TRUE(UnitTestHelper::getPipeControlHdcPipelineFlush(*pipeControlCmd)); EXPECT_TRUE(pipeControlCmd->getAmfsFlushEnable()); EXPECT_TRUE(pipeControlCmd->getCommandStreamerStallEnable()); EXPECT_TRUE(pipeControlCmd->getInstructionCacheInvalidateEnable()); diff --git a/opencl/test/unit_test/command_stream/command_stream_receiver_hw_tests_dg2_and_later.cpp b/opencl/test/unit_test/command_stream/command_stream_receiver_hw_tests_dg2_and_later.cpp index c19ab2d8f3..eb5c64d7b3 100644 --- a/opencl/test/unit_test/command_stream/command_stream_receiver_hw_tests_dg2_and_later.cpp +++ b/opencl/test/unit_test/command_stream/command_stream_receiver_hw_tests_dg2_and_later.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -118,7 +118,7 @@ HWTEST2_F(CommandStreamReceiverFlushTasDg2AndLaterTests, givenProgramPipeControl --_3dStateBtdIterator; auto pipeControlCmd = genCmdCast(*_3dStateBtdIterator); - EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush()); + EXPECT_TRUE(UnitTestHelper::getPipeControlHdcPipelineFlush(*pipeControlCmd)); EXPECT_TRUE(pipeControlCmd->getAmfsFlushEnable()); EXPECT_TRUE(pipeControlCmd->getCommandStreamerStallEnable()); EXPECT_TRUE(pipeControlCmd->getInstructionCacheInvalidateEnable()); diff --git a/opencl/test/unit_test/helpers/hw_helper_tests_dg2_and_later.cpp b/opencl/test/unit_test/helpers/hw_helper_tests_dg2_and_later.cpp index e6438385bf..4fce73117e 100644 --- a/opencl/test/unit_test/helpers/hw_helper_tests_dg2_and_later.cpp +++ b/opencl/test/unit_test/helpers/hw_helper_tests_dg2_and_later.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -44,7 +44,7 @@ HWTEST2_F(PipeControlHelperTestsDg2AndLater, WhenAddingPipeControlWAThenCorrectC PIPE_CONTROL expectedPipeControl = FamilyType::cmdInitPipeControl; expectedPipeControl.setCommandStreamerStallEnable(true); - expectedPipeControl.setHdcPipelineFlush(true); + UnitTestHelper::setPipeControlHdcPipelineFlush(expectedPipeControl, true); expectedPipeControl.setUnTypedDataPortCacheFlush(true); auto it = cmdList.begin(); auto pPipeControl = genCmdCast(*it); @@ -107,7 +107,7 @@ HWTEST2_F(PipeControlHelperTestsDg2AndLater, givenRequestedCacheFlushesWhenProgr MemorySynchronizationCommands::addPipeControl(stream, args); auto pipeControl = reinterpret_cast(buffer); - EXPECT_TRUE(pipeControl->getHdcPipelineFlush()); + EXPECT_TRUE(UnitTestHelper::getPipeControlHdcPipelineFlush(*pipeControl)); EXPECT_TRUE(pipeControl->getUnTypedDataPortCacheFlush()); EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush()); } @@ -124,7 +124,7 @@ HWTEST2_F(PipeControlHelperTestsDg2AndLater, givenDebugVariableSetWhenProgrammin MemorySynchronizationCommands::addPipeControl(stream, args); auto pipeControl = reinterpret_cast(buffer); - EXPECT_TRUE(pipeControl->getHdcPipelineFlush()); + EXPECT_TRUE(UnitTestHelper::getPipeControlHdcPipelineFlush(*pipeControl)); EXPECT_TRUE(pipeControl->getUnTypedDataPortCacheFlush()); EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush()); } @@ -144,7 +144,7 @@ HWTEST2_F(PipeControlHelperTestsDg2AndLater, givenDebugDisableCacheFlushWhenProg MemorySynchronizationCommands::addPipeControl(stream, args); auto pipeControl = reinterpret_cast(buffer); - EXPECT_FALSE(pipeControl->getHdcPipelineFlush()); + EXPECT_FALSE(UnitTestHelper::getPipeControlHdcPipelineFlush(*pipeControl)); EXPECT_FALSE(pipeControl->getUnTypedDataPortCacheFlush()); EXPECT_FALSE(pipeControl->getCompressionControlSurfaceCcsFlush()); } diff --git a/opencl/test/unit_test/helpers/hw_helper_tests_xehp_and_later.cpp b/opencl/test/unit_test/helpers/hw_helper_tests_xehp_and_later.cpp index 96c0911b6d..452e8a1eec 100644 --- a/opencl/test/unit_test/helpers/hw_helper_tests_xehp_and_later.cpp +++ b/opencl/test/unit_test/helpers/hw_helper_tests_xehp_and_later.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -248,7 +248,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, PipeControlHelperTestsXeHPAndLater, WhenAddingPipeC PIPE_CONTROL expectedPipeControl = FamilyType::cmdInitPipeControl; expectedPipeControl.setCommandStreamerStallEnable(true); - expectedPipeControl.setHdcPipelineFlush(true); + UnitTestHelper::setPipeControlHdcPipelineFlush(expectedPipeControl, true); auto it = cmdList.begin(); auto pPipeControl = genCmdCast(*it); ASSERT_NE(nullptr, pPipeControl); @@ -312,7 +312,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, PipeControlHelperTestsXeHPAndLater, givenRequestedC MemorySynchronizationCommands::addPipeControl(stream, args); auto pipeControl = reinterpret_cast(buffer); - EXPECT_TRUE(pipeControl->getHdcPipelineFlush()); + EXPECT_TRUE(UnitTestHelper::getPipeControlHdcPipelineFlush(*pipeControl)); EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush()); } @@ -328,7 +328,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, PipeControlHelperTestsXeHPAndLater, givenDebugVaria MemorySynchronizationCommands::addPipeControl(stream, args); auto pipeControl = reinterpret_cast(buffer); - EXPECT_TRUE(pipeControl->getHdcPipelineFlush()); + EXPECT_TRUE(UnitTestHelper::getPipeControlHdcPipelineFlush(*pipeControl)); EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush()); } @@ -346,7 +346,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, PipeControlHelperTestsXeHPAndLater, givenDebugDisab MemorySynchronizationCommands::addPipeControl(stream, args); auto pipeControl = reinterpret_cast(buffer); - EXPECT_FALSE(pipeControl->getHdcPipelineFlush()); + EXPECT_FALSE(UnitTestHelper::getPipeControlHdcPipelineFlush(*pipeControl)); EXPECT_FALSE(pipeControl->getCompressionControlSurfaceCcsFlush()); } diff --git a/shared/source/gen11/hw_cmds_base.h b/shared/source/gen11/hw_cmds_base.h index 0d9a53f107..d23c7cc47f 100644 --- a/shared/source/gen11/hw_cmds_base.h +++ b/shared/source/gen11/hw_cmds_base.h @@ -21,6 +21,7 @@ struct GEN11 { #include "shared/source/generated/gen11/hw_cmds_generated_gen11.inl" static constexpr bool supportsSampler = true; + static constexpr bool isUsingGenericMediaStateClear = true; struct DataPortBindlessSurfaceExtendedMessageDescriptor { union { struct { diff --git a/shared/source/gen12lp/hw_cmds_base.h b/shared/source/gen12lp/hw_cmds_base.h index 8666383ff6..101d7e0f5e 100644 --- a/shared/source/gen12lp/hw_cmds_base.h +++ b/shared/source/gen12lp/hw_cmds_base.h @@ -23,6 +23,7 @@ struct GEN12LP { #include "shared/source/generated/gen12lp/hw_cmds_generated_gen12lp.inl" static constexpr bool supportsSampler = true; + static constexpr bool isUsingGenericMediaStateClear = true; static constexpr uint32_t stateComputeModeForceNonCoherentMask = (0b11u << 3); struct DataPortBindlessSurfaceExtendedMessageDescriptor { diff --git a/shared/source/gen8/hw_cmds_base.h b/shared/source/gen8/hw_cmds_base.h index 201202998f..06327369c5 100644 --- a/shared/source/gen8/hw_cmds_base.h +++ b/shared/source/gen8/hw_cmds_base.h @@ -23,6 +23,7 @@ struct GEN8 { #include "shared/source/generated/gen8/hw_cmds_generated_gen8.inl" static constexpr bool supportsSampler = true; + static constexpr bool isUsingGenericMediaStateClear = true; struct DataPortBindlessSurfaceExtendedMessageDescriptor { union { struct { diff --git a/shared/source/gen9/hw_cmds_base.h b/shared/source/gen9/hw_cmds_base.h index 340d877097..6862779885 100644 --- a/shared/source/gen9/hw_cmds_base.h +++ b/shared/source/gen9/hw_cmds_base.h @@ -23,6 +23,7 @@ struct GEN9 { #include "shared/source/generated/gen9/hw_cmds_generated_gen9.inl" static constexpr bool supportsSampler = true; + static constexpr bool isUsingGenericMediaStateClear = true; struct DataPortBindlessSurfaceExtendedMessageDescriptor { union { struct { diff --git a/shared/source/helpers/hw_helper_base.inl b/shared/source/helpers/hw_helper_base.inl index 5f270e579a..27c51be338 100644 --- a/shared/source/helpers/hw_helper_base.inl +++ b/shared/source/helpers/hw_helper_base.inl @@ -313,11 +313,13 @@ void MemorySynchronizationCommands::setPipeControl(typename GfxFamily pipeControl.setStateCacheInvalidationEnable(args.stateCacheInvalidationEnable); pipeControl.setTextureCacheInvalidationEnable(args.textureCacheInvalidationEnable); pipeControl.setVfCacheInvalidationEnable(args.vfCacheInvalidationEnable); - pipeControl.setGenericMediaStateClear(args.genericMediaStateClear); pipeControl.setTlbInvalidate(args.tlbInvalidation); pipeControl.setNotifyEnable(args.notifyEnable); pipeControl.setDcFlushEnable(args.dcFlushEnable); + if constexpr (GfxFamily::isUsingGenericMediaStateClear) { + pipeControl.setGenericMediaStateClear(args.genericMediaStateClear); + } setPipeControlExtraProperties(pipeControl, args); if (DebugManager.flags.FlushAllCaches.get()) { diff --git a/shared/source/helpers/hw_helper_dg2_and_later.inl b/shared/source/helpers/hw_helper_dg2_and_later.inl index 701a355eaf..3caef5fa1b 100644 --- a/shared/source/helpers/hw_helper_dg2_and_later.inl +++ b/shared/source/helpers/hw_helper_dg2_and_later.inl @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -45,8 +45,8 @@ inline void MemorySynchronizationCommands::setCacheFlushExtraProperti args.unTypedDataPortCacheFlush = true; } -template <> -void MemorySynchronizationCommands::setPipeControlWAFlags(PIPE_CONTROL &pipeControl) { +template +void MemorySynchronizationCommands::setPipeControlWAFlags(PIPE_CONTROL &pipeControl) { pipeControl.setCommandStreamerStallEnable(true); pipeControl.setHdcPipelineFlush(true); pipeControl.setUnTypedDataPortCacheFlush(true); diff --git a/shared/source/xe_hp_core/hw_cmds_base.h b/shared/source/xe_hp_core/hw_cmds_base.h index 7b10794830..d2050a41a0 100644 --- a/shared/source/xe_hp_core/hw_cmds_base.h +++ b/shared/source/xe_hp_core/hw_cmds_base.h @@ -30,6 +30,7 @@ struct XeHpCore { static constexpr bool isUsingL3Control = true; static constexpr bool isUsingMediaSamplerDopClockGate = true; static constexpr bool supportsSampler = true; + static constexpr bool isUsingGenericMediaStateClear = true; struct DataPortBindlessSurfaceExtendedMessageDescriptor { union { diff --git a/shared/source/xe_hpc_core/hw_cmds_base.h b/shared/source/xe_hpc_core/hw_cmds_base.h index 3fa2286db1..309eaf83f9 100644 --- a/shared/source/xe_hpc_core/hw_cmds_base.h +++ b/shared/source/xe_hpc_core/hw_cmds_base.h @@ -36,6 +36,7 @@ struct XE_HPC_CORE { static constexpr bool isUsingL3Control = false; static constexpr bool isUsingMediaSamplerDopClockGate = false; static constexpr bool supportsSampler = false; + static constexpr bool isUsingGenericMediaStateClear = true; static bool isXlA0(const HardwareInfo &hwInfo) { auto revId = hwInfo.platform.usRevId & pvcSteppingBits; diff --git a/shared/source/xe_hpg_core/hw_cmds_base.h b/shared/source/xe_hpg_core/hw_cmds_base.h index 0d41b3ffdf..3a7d689fae 100644 --- a/shared/source/xe_hpg_core/hw_cmds_base.h +++ b/shared/source/xe_hpg_core/hw_cmds_base.h @@ -30,6 +30,7 @@ struct XE_HPG_CORE { static constexpr bool isUsingL3Control = true; static constexpr bool isUsingMediaSamplerDopClockGate = false; static constexpr bool supportsSampler = true; + static constexpr bool isUsingGenericMediaStateClear = true; struct DataPortBindlessSurfaceExtendedMessageDescriptor { union { diff --git a/shared/test/common/gen11/unit_test_helper_gen11.cpp b/shared/test/common/gen11/unit_test_helper_gen11.cpp index ef1997d907..6580d33e1a 100644 --- a/shared/test/common/gen11/unit_test_helper_gen11.cpp +++ b/shared/test/common/gen11/unit_test_helper_gen11.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -8,6 +8,7 @@ #include "shared/source/gen11/hw_info.h" #include "shared/test/common/helpers/unit_test_helper.h" #include "shared/test/common/helpers/unit_test_helper.inl" +#include "shared/test/common/helpers/unit_test_helper_bdw_and_later.inl" namespace NEO { diff --git a/shared/test/common/gen12lp/unit_test_helper_gen12lp.cpp b/shared/test/common/gen12lp/unit_test_helper_gen12lp.cpp index 000ab5e520..75ba3d06a7 100644 --- a/shared/test/common/gen12lp/unit_test_helper_gen12lp.cpp +++ b/shared/test/common/gen12lp/unit_test_helper_gen12lp.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -8,6 +8,7 @@ #include "shared/source/gen12lp/hw_info.h" #include "shared/test/common/helpers/unit_test_helper.h" #include "shared/test/common/helpers/unit_test_helper.inl" +#include "shared/test/common/helpers/unit_test_helper_bdw_and_later.inl" #include "shared/test/common/libult/gen12lp/special_ult_helper_gen12lp.h" namespace NEO { diff --git a/shared/test/common/gen8/unit_test_helper_gen8.cpp b/shared/test/common/gen8/unit_test_helper_gen8.cpp index 94b6c4e32a..60369fac77 100644 --- a/shared/test/common/gen8/unit_test_helper_gen8.cpp +++ b/shared/test/common/gen8/unit_test_helper_gen8.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -8,6 +8,7 @@ #include "shared/source/gen8/hw_info.h" #include "shared/test/common/helpers/unit_test_helper.h" #include "shared/test/common/helpers/unit_test_helper.inl" +#include "shared/test/common/helpers/unit_test_helper_bdw_and_later.inl" namespace NEO { diff --git a/shared/test/common/gen9/unit_test_helper_gen9.cpp b/shared/test/common/gen9/unit_test_helper_gen9.cpp index f8a29d18d2..1e3e2eb5e9 100644 --- a/shared/test/common/gen9/unit_test_helper_gen9.cpp +++ b/shared/test/common/gen9/unit_test_helper_gen9.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -8,6 +8,7 @@ #include "shared/source/gen9/hw_info.h" #include "shared/test/common/helpers/unit_test_helper.h" #include "shared/test/common/helpers/unit_test_helper.inl" +#include "shared/test/common/helpers/unit_test_helper_bdw_and_later.inl" namespace NEO { using Family = SKLFamily; diff --git a/shared/test/common/helpers/unit_test_helper.h b/shared/test/common/helpers/unit_test_helper.h index 35c81d4de9..234daa7367 100644 --- a/shared/test/common/helpers/unit_test_helper.h +++ b/shared/test/common/helpers/unit_test_helper.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2018-2021 Intel Corporation + * Copyright (C) 2018-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -67,6 +67,8 @@ struct UnitTestHelper { static const bool additionalMiFlushDwRequired; static uint64_t getPipeControlPostSyncAddress(const typename GfxFamily::PIPE_CONTROL &pipeControl); + static bool getPipeControlHdcPipelineFlush(const typename GfxFamily::PIPE_CONTROL &pipeControl); + static void setPipeControlHdcPipelineFlush(typename GfxFamily::PIPE_CONTROL &pipeControl, bool hdcPipelineFlush); }; } // namespace NEO diff --git a/shared/test/common/helpers/unit_test_helper.inl b/shared/test/common/helpers/unit_test_helper.inl index 5013878b29..e399b3b852 100644 --- a/shared/test/common/helpers/unit_test_helper.inl +++ b/shared/test/common/helpers/unit_test_helper.inl @@ -1,5 +1,5 @@ /* - * Copyright (C) 2018-2021 Intel Corporation + * Copyright (C) 2018-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -7,49 +7,16 @@ namespace NEO { -template -bool UnitTestHelper::isL3ConfigProgrammable() { - return true; -}; - -template -bool UnitTestHelper::evaluateDshUsage(size_t sizeBeforeEnqueue, size_t sizeAfterEnqueue, const KernelDescriptor *kernelDescriptor, uint32_t rootDeviceIndex) { - if (sizeBeforeEnqueue != sizeAfterEnqueue) { - return true; - } - return false; -} - template bool UnitTestHelper::isPageTableManagerSupported(const HardwareInfo &hwInfo) { return false; } -template -bool UnitTestHelper::isTimestampPacketWriteSupported() { - return false; -} - -template -bool UnitTestHelper::isExpectMemoryNotEqualSupported() { - return false; -} - -template -uint32_t UnitTestHelper::getDefaultSshUsage() { - return sizeof(typename GfxFamily::RENDER_SURFACE_STATE); -} - template inline uint32_t UnitTestHelper::getAppropriateThreadArbitrationPolicy(uint32_t policy) { return policy; } -template -bool UnitTestHelper::evaluateGshAddressForScratchSpace(uint64_t usedScratchGpuAddress, uint64_t retrievedGshAddress) { - return usedScratchGpuAddress == retrievedGshAddress; -} - template bool UnitTestHelper::isPipeControlWArequired(const HardwareInfo &hwInfo) { return false; @@ -65,11 +32,6 @@ bool UnitTestHelper::isAdditionalMiSemaphoreWaitRequired(const Hardwa return false; } -template -bool UnitTestHelper::isAdditionalMiSemaphoreWait(const typename GfxFamily::MI_SEMAPHORE_WAIT &semaphoreWait) { - return false; -} - template inline uint64_t UnitTestHelper::getAtomicMemoryAddress(const typename GfxFamily::MI_ATOMIC &atomic) { return atomic.getMemoryAddress() | ((static_cast(atomic.getMemoryAddressHigh())) << 32); @@ -85,11 +47,6 @@ void UnitTestHelper::setExtraMidThreadPreemptionFlag(HardwareInfo &hw hwInfo.featureTable.flags.ftrGpGpuMidThreadLevelPreempt = value; } -template -auto UnitTestHelper::getCoherencyTypeSupported(COHERENCY_TYPE coherencyType) -> decltype(coherencyType) { - return coherencyType; -} - template const bool UnitTestHelper::tiledImagesSupported = true; diff --git a/shared/test/common/helpers/unit_test_helper_bdw_and_later.inl b/shared/test/common/helpers/unit_test_helper_bdw_and_later.inl new file mode 100644 index 0000000000..3235191940 --- /dev/null +++ b/shared/test/common/helpers/unit_test_helper_bdw_and_later.inl @@ -0,0 +1,62 @@ +/* + * Copyright (C) 2022 Intel Corporation + * + * SPDX-License-Identifier: MIT + * + */ + +#include "shared/test/common/helpers/unit_test_helper.h" + +namespace NEO { + +template +bool UnitTestHelper::isL3ConfigProgrammable() { + return true; +}; + +template +bool UnitTestHelper::evaluateDshUsage(size_t sizeBeforeEnqueue, size_t sizeAfterEnqueue, const KernelDescriptor *kernelDescriptor, uint32_t rootDeviceIndex) { + if (sizeBeforeEnqueue != sizeAfterEnqueue) { + return true; + } + return false; +} + +template +bool UnitTestHelper::isTimestampPacketWriteSupported() { + return false; +} + +template +bool UnitTestHelper::isExpectMemoryNotEqualSupported() { + return false; +} + +template +uint32_t UnitTestHelper::getDefaultSshUsage() { + return sizeof(typename GfxFamily::RENDER_SURFACE_STATE); +} + +template +bool UnitTestHelper::isAdditionalMiSemaphoreWait(const typename GfxFamily::MI_SEMAPHORE_WAIT &semaphoreWait) { + return false; +} + +template +bool UnitTestHelper::evaluateGshAddressForScratchSpace(uint64_t usedScratchGpuAddress, uint64_t retrievedGshAddress) { + return usedScratchGpuAddress == retrievedGshAddress; +} + +template +auto UnitTestHelper::getCoherencyTypeSupported(COHERENCY_TYPE coherencyType) -> decltype(coherencyType) { + return coherencyType; +} + +template +inline bool UnitTestHelper::getPipeControlHdcPipelineFlush(const typename GfxFamily::PIPE_CONTROL &pipeControl) { + return false; +} + +template +inline void UnitTestHelper::setPipeControlHdcPipelineFlush(typename GfxFamily::PIPE_CONTROL &pipeControl, bool hdcPipelineFlush) {} +} // namespace NEO diff --git a/shared/test/common/helpers/unit_test_helper_xehp_and_later.inl b/shared/test/common/helpers/unit_test_helper_xehp_and_later.inl index cac5414681..428045c122 100644 --- a/shared/test/common/helpers/unit_test_helper_xehp_and_later.inl +++ b/shared/test/common/helpers/unit_test_helper_xehp_and_later.inl @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -8,16 +8,17 @@ #include "shared/source/command_container/command_encoder.h" #include "shared/source/debug_settings/debug_settings_manager.h" #include "shared/source/kernel/kernel_descriptor.h" +#include "shared/test/common/helpers/unit_test_helper.h" namespace NEO { -template <> -bool UnitTestHelper::isL3ConfigProgrammable() { +template +bool UnitTestHelper::isL3ConfigProgrammable() { return false; }; -template <> -bool UnitTestHelper::evaluateDshUsage(size_t sizeBeforeEnqueue, size_t sizeAfterEnqueue, const KernelDescriptor *kernelDescriptor, uint32_t rootDeviceIndex) { +template +bool UnitTestHelper::evaluateDshUsage(size_t sizeBeforeEnqueue, size_t sizeAfterEnqueue, const KernelDescriptor *kernelDescriptor, uint32_t rootDeviceIndex) { if (kernelDescriptor == nullptr) { if (sizeBeforeEnqueue == sizeAfterEnqueue) { return true; @@ -39,34 +40,42 @@ bool UnitTestHelper::evaluateDshUsage(size_t sizeBeforeEnqueue, size_t s } } -template <> -bool UnitTestHelper::isTimestampPacketWriteSupported() { +template +bool UnitTestHelper::isTimestampPacketWriteSupported() { return true; }; -template <> -bool UnitTestHelper::isExpectMemoryNotEqualSupported() { +template +bool UnitTestHelper::isExpectMemoryNotEqualSupported() { return true; } -template <> -uint32_t UnitTestHelper::getDefaultSshUsage() { +template +uint32_t UnitTestHelper::getDefaultSshUsage() { return (32 * 2 * 64); } -template <> -bool UnitTestHelper::isAdditionalMiSemaphoreWait(const typename Family::MI_SEMAPHORE_WAIT &semaphoreWait) { - return (semaphoreWait.getSemaphoreDataDword() == EncodeSempahore::invalidHardwareTag); +template +bool UnitTestHelper::isAdditionalMiSemaphoreWait(const typename GfxFamily::MI_SEMAPHORE_WAIT &semaphoreWait) { + return (semaphoreWait.getSemaphoreDataDword() == EncodeSempahore::invalidHardwareTag); } -template <> -bool UnitTestHelper::evaluateGshAddressForScratchSpace(uint64_t usedScratchGpuAddress, uint64_t retrievedGshAddress) { +template +bool UnitTestHelper::evaluateGshAddressForScratchSpace(uint64_t usedScratchGpuAddress, uint64_t retrievedGshAddress) { return 0llu == retrievedGshAddress; } -template <> -auto UnitTestHelper::getCoherencyTypeSupported(COHERENCY_TYPE coherencyType) -> decltype(coherencyType) { - return Family::RENDER_SURFACE_STATE::COHERENCY_TYPE_GPU_COHERENT; +template +auto UnitTestHelper::getCoherencyTypeSupported(COHERENCY_TYPE coherencyType) -> decltype(coherencyType) { + return GfxFamily::RENDER_SURFACE_STATE::COHERENCY_TYPE_GPU_COHERENT; } +template +inline bool UnitTestHelper::getPipeControlHdcPipelineFlush(const typename GfxFamily::PIPE_CONTROL &pipeControl) { + return pipeControl.getHdcPipelineFlush(); +} +template +inline void UnitTestHelper::setPipeControlHdcPipelineFlush(typename GfxFamily::PIPE_CONTROL &pipeControl, bool hdcPipelineFlush) { + pipeControl.setHdcPipelineFlush(hdcPipelineFlush); +} } // namespace NEO diff --git a/shared/test/common/libult/CMakeLists.txt b/shared/test/common/libult/CMakeLists.txt index 434dc36b55..b8e751533f 100644 --- a/shared/test/common/libult/CMakeLists.txt +++ b/shared/test/common/libult/CMakeLists.txt @@ -88,6 +88,7 @@ set(neo_libult_common_SRCS_LIB_ULT ${NEO_SHARED_TEST_DIRECTORY}/common/helpers/test_files.h ${NEO_SHARED_TEST_DIRECTORY}/common/helpers/unit_test_helper.h ${NEO_SHARED_TEST_DIRECTORY}/common/helpers/unit_test_helper.inl + ${NEO_SHARED_TEST_DIRECTORY}/common/helpers/unit_test_helper_bdw_and_later.inl ${NEO_SHARED_TEST_DIRECTORY}/common/libult/abort.cpp ${NEO_SHARED_TEST_DIRECTORY}/common/libult/create_tbx_sockets.cpp ${NEO_SHARED_TEST_DIRECTORY}/common/libult/debug_settings_reader_creator.cpp diff --git a/shared/test/common/xe_hp_core/unit_test_helper_xe_hp_core.cpp b/shared/test/common/xe_hp_core/unit_test_helper_xe_hp_core.cpp index 66cc8f5129..3cc68a36ea 100644 --- a/shared/test/common/xe_hp_core/unit_test_helper_xe_hp_core.cpp +++ b/shared/test/common/xe_hp_core/unit_test_helper_xe_hp_core.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -8,8 +8,8 @@ #include "shared/source/xe_hp_core/hw_info.h" #include "shared/test/common/helpers/unit_test_helper.h" #include "shared/test/common/helpers/unit_test_helper.inl" -using Family = NEO::XeHpFamily; #include "shared/test/common/helpers/unit_test_helper_xehp_and_later.inl" +using Family = NEO::XeHpFamily; namespace NEO { template <> diff --git a/shared/test/common/xe_hpc_core/unit_test_helper_xe_hpc_core.cpp b/shared/test/common/xe_hpc_core/unit_test_helper_xe_hpc_core.cpp index 745a9222cc..2013143130 100644 --- a/shared/test/common/xe_hpc_core/unit_test_helper_xe_hpc_core.cpp +++ b/shared/test/common/xe_hpc_core/unit_test_helper_xe_hpc_core.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -8,8 +8,8 @@ #include "shared/source/xe_hpc_core/hw_info.h" #include "shared/test/common/helpers/unit_test_helper.h" #include "shared/test/common/helpers/unit_test_helper.inl" -using Family = NEO::XE_HPC_COREFamily; #include "shared/test/common/helpers/unit_test_helper_xehp_and_later.inl" +using Family = NEO::XE_HPC_COREFamily; namespace NEO { diff --git a/shared/test/common/xe_hpg_core/unit_test_helper_xe_hpg_core.cpp b/shared/test/common/xe_hpg_core/unit_test_helper_xe_hpg_core.cpp index 11ba8f4208..6210c3c594 100644 --- a/shared/test/common/xe_hpg_core/unit_test_helper_xe_hpg_core.cpp +++ b/shared/test/common/xe_hpg_core/unit_test_helper_xe_hpg_core.cpp @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -8,8 +8,8 @@ #include "shared/source/xe_hpg_core/hw_info.h" #include "shared/test/common/helpers/unit_test_helper.h" #include "shared/test/common/helpers/unit_test_helper.inl" -using Family = NEO::XE_HPG_COREFamily; #include "shared/test/common/helpers/unit_test_helper_xehp_and_later.inl" +using Family = NEO::XE_HPG_COREFamily; namespace NEO { template <>