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fix: Only expose THREAD_SCATCH dbg reg in heapless mode

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Related-to: NEO-14653

Signed-off-by: Brandon Yates <brandon.yates@intel.com>
This commit is contained in:
Brandon Yates
2025-04-15 16:28:11 +00:00
committed by Compute-Runtime-Automation
parent 1816c8eac4
commit e981e85c31
3 changed files with 9 additions and 8 deletions
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2
level_zero/tools/source/debug/debug_session_imp.cpp
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@@ -1443,7 +1443,9 @@ ze_result_t DebugSession::getRegisterSetProperties(Device *device, uint32_t *pCo
parseRegsetDesc(pStateSaveArea->regHeaderV3.msg, ZET_DEBUG_REGSET_TYPE_MSG_INTEL_GPU);
parseRegsetDesc(*DebugSessionImp::getModeFlagsRegsetDesc(), ZET_DEBUG_REGSET_TYPE_MODE_FLAGS_INTEL_GPU);
parseRegsetDesc(*DebugSessionImp::getDebugScratchRegsetDesc(), ZET_DEBUG_REGSET_TYPE_DEBUG_SCRATCH_INTEL_GPU);
if (DebugSessionImp::isHeaplessMode(pStateSaveArea->regHeaderV3)) {
parseRegsetDesc(*DebugSessionImp::getThreadScratchRegsetDesc(), ZET_DEBUG_REGSET_TYPE_THREAD_SCRATCH_INTEL_GPU);
}
parseRegsetDesc(pStateSaveArea->regHeaderV3.scalar, ZET_DEBUG_REGSET_TYPE_SCALAR_INTEL_GPU);
} else if (pStateSaveArea->versionHeader.version.major < 3) {

4
level_zero/tools/test/unit_tests/sources/debug/debug_session_common.h
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@@ -1,5 +1,5 @@
/*
* Copyright (C) 2022-2024 Intel Corporation
* Copyright (C) 2022-2025 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
@@ -34,7 +34,7 @@ struct DebugApiFixture : public DeviceFixture {
void setUpV3Header() {
mockBuiltins->stateSaveAreaHeader = MockSipData::createStateSaveAreaHeader(3);
}
void setUpV3HeaderHeapless() {
void setUpV3HeaderWithoutHeapless() {
mockBuiltins->stateSaveAreaHeader = MockSipData::createStateSaveAreaHeader(3);
auto pStateSaveArea = reinterpret_cast<NEO::StateSaveAreaHeader *>(mockBuiltins->stateSaveAreaHeader.data());
pStateSaveArea->regHeaderV3.sip_flags = 0;

9
level_zero/tools/test/unit_tests/sources/debug/test_debug_api.cpp
View File

@@ -400,15 +400,15 @@ TEST_F(DebugApiTest, givenGetRegisterSetPropertiesCalledWithV3HeaderCorrectPrope
TEST_F(DebugApiTest, givenGetRegisterSetPropertiesCalledWhenV3HeaderHeaplessThenCorrectPropertiesReturned) {
setUpV3HeaderHeapless();
setUpV3HeaderWithoutHeapless();
uint32_t count = 0;
EXPECT_EQ(ZE_RESULT_SUCCESS, zetDebugGetRegisterSetProperties(device->toHandle(), &count, nullptr));
EXPECT_EQ(18u, count);
EXPECT_EQ(17u, count);
std::vector<zet_debug_regset_properties_t> regsetProps(count);
EXPECT_EQ(ZE_RESULT_SUCCESS, zetDebugGetRegisterSetProperties(device->toHandle(), &count, regsetProps.data()));
EXPECT_EQ(18u, count);
EXPECT_EQ(17u, count);
auto validateRegsetProps = [](const zet_debug_regset_properties_t &regsetProps,
zet_debug_regset_type_intel_gpu_t type, zet_debug_regset_flags_t flags,
@@ -439,8 +439,7 @@ TEST_F(DebugApiTest, givenGetRegisterSetPropertiesCalledWhenV3HeaderHeaplessThen
validateRegsetProps(regsetProps[13], ZET_DEBUG_REGSET_TYPE_MSG_INTEL_GPU, ZET_DEBUG_REGSET_FLAG_READABLE | ZET_DEBUG_REGSET_FLAG_WRITEABLE, 1, 64, 8);
validateRegsetProps(regsetProps[14], ZET_DEBUG_REGSET_TYPE_MODE_FLAGS_INTEL_GPU, ZET_DEBUG_REGSET_FLAG_READABLE, 1, 32, 4);
validateRegsetProps(regsetProps[15], ZET_DEBUG_REGSET_TYPE_DEBUG_SCRATCH_INTEL_GPU, ZET_DEBUG_REGSET_FLAG_READABLE, 2, 64, 8);
validateRegsetProps(regsetProps[16], ZET_DEBUG_REGSET_TYPE_THREAD_SCRATCH_INTEL_GPU, ZET_DEBUG_REGSET_FLAG_READABLE, 2, 64, 8);
validateRegsetProps(regsetProps[17], ZET_DEBUG_REGSET_TYPE_SCALAR_INTEL_GPU, ZET_DEBUG_REGSET_FLAG_READABLE | ZET_DEBUG_REGSET_FLAG_WRITEABLE, 1, 64, 8);
validateRegsetProps(regsetProps[16], ZET_DEBUG_REGSET_TYPE_SCALAR_INTEL_GPU, ZET_DEBUG_REGSET_FLAG_READABLE | ZET_DEBUG_REGSET_FLAG_WRITEABLE, 1, 64, 8);
}
TEST_F(DebugApiTest, givenGetRegisterSetPropertiesCalledCorrectPropertiesReturned) {