diff --git a/level_zero/core/source/cmdlist/cmdlist_hw.inl b/level_zero/core/source/cmdlist/cmdlist_hw.inl index 17af964fd7..996c44b067 100644 --- a/level_zero/core/source/cmdlist/cmdlist_hw.inl +++ b/level_zero/core/source/cmdlist/cmdlist_hw.inl @@ -2280,11 +2280,9 @@ ze_result_t CommandListCoreFamily::setGlobalWorkSizeIndirect(NEO: template void CommandListCoreFamily::programStateBaseAddress(NEO::CommandContainer &container, bool genericMediaStateClearRequired) { const auto &hwInfo = this->device->getHwInfo(); - NEO::PipeControlArgs args; - args.dcFlushEnable = NEO::MemorySynchronizationCommands::getDcFlushEnable(true, hwInfo); - args.hdcPipelineFlush = true; - args.textureCacheInvalidationEnable = true; - NEO::MemorySynchronizationCommands::addPipeControl(*commandContainer.getCommandStream(), args); + bool isRcs = (this->engineGroupType == NEO::EngineGroupType::RenderCompute); + + NEO::EncodeWA::addPipeControlBeforeStateBaseAddress(*commandContainer.getCommandStream(), hwInfo, isRcs); STATE_BASE_ADDRESS sba; NEO::EncodeStateBaseAddress::encode(commandContainer, sba, this->partitionCount > 1); diff --git a/level_zero/core/source/cmdqueue/cmdqueue_hw_base.inl b/level_zero/core/source/cmdqueue/cmdqueue_hw_base.inl index 7906f6f3e4..d0b179ad7d 100644 --- a/level_zero/core/source/cmdqueue/cmdqueue_hw_base.inl +++ b/level_zero/core/source/cmdqueue/cmdqueue_hw_base.inl @@ -35,14 +35,10 @@ void CommandQueueHw::programStateBaseAddress(uint64_t gsba, bool using STATE_BASE_ADDRESS = typename GfxFamily::STATE_BASE_ADDRESS; const auto &hwInfo = this->device->getHwInfo(); - NEO::PipeControlArgs pcArgs; - pcArgs.dcFlushEnable = NEO::MemorySynchronizationCommands::getDcFlushEnable(true, hwInfo); - pcArgs.textureCacheInvalidationEnable = true; - - NEO::MemorySynchronizationCommands::addPipeControl(commandStream, pcArgs); - NEO::Device *neoDevice = device->getNEODevice(); bool isRcs = this->getCsr()->isRcs(); + + NEO::EncodeWA::addPipeControlBeforeStateBaseAddress(commandStream, hwInfo, isRcs); NEO::EncodeWA::encodeAdditionalPipelineSelect(commandStream, {}, true, hwInfo, isRcs); auto pSbaCmd = static_cast(commandStream.getSpace(sizeof(STATE_BASE_ADDRESS))); diff --git a/level_zero/core/source/cmdqueue/cmdqueue_xe_hp_core_and_later.inl b/level_zero/core/source/cmdqueue/cmdqueue_xe_hp_core_and_later.inl index 933b1d2870..2d5cd6cae8 100644 --- a/level_zero/core/source/cmdqueue/cmdqueue_xe_hp_core_and_later.inl +++ b/level_zero/core/source/cmdqueue/cmdqueue_xe_hp_core_and_later.inl @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -28,9 +28,9 @@ void CommandQueueHw::programStateBaseAddress(uint64_t gsba, bool NEO::Device *neoDevice = device->getNEODevice(); auto globalHeapsBase = neoDevice->getBindlessHeapsHelper()->getGlobalHeapsBase(); auto &hwInfo = neoDevice->getHardwareInfo(); - NEO::PipeControlArgs args; - args.dcFlushEnable = NEO::MemorySynchronizationCommands::getDcFlushEnable(true, hwInfo); - NEO::MemorySynchronizationCommands::addPipeControl(commandStream, args); + bool isRcs = this->getCsr()->isRcs(); + + NEO::EncodeWA::addPipeControlBeforeStateBaseAddress(commandStream, hwInfo, isRcs); auto pSbaCmd = static_cast(commandStream.getSpace(sizeof(STATE_BASE_ADDRESS))); STATE_BASE_ADDRESS sbaCmd; bool multiOsContextCapable = device->isImplicitScalingCapable(); diff --git a/level_zero/core/test/unit_tests/sources/cmdlist/test_cmdlist_xehp_and_later.cpp b/level_zero/core/test/unit_tests/sources/cmdlist/test_cmdlist_xehp_and_later.cpp index 7a4440aa22..aea89e21be 100644 --- a/level_zero/core/test/unit_tests/sources/cmdlist/test_cmdlist_xehp_and_later.cpp +++ b/level_zero/core/test/unit_tests/sources/cmdlist/test_cmdlist_xehp_and_later.cpp @@ -8,6 +8,7 @@ #include "shared/source/gmm_helper/gmm_helper.h" #include "shared/source/helpers/preamble.h" #include "shared/test/common/cmd_parse/gen_cmd_parse.h" +#include "shared/test/common/helpers/unit_test_helper.h" #include "shared/test/common/test_macros/test.h" #include "level_zero/core/source/cmdlist/cmdlist_hw.h" @@ -17,6 +18,8 @@ #include "level_zero/core/test/unit_tests/mocks/mock_cmdlist.h" #include "level_zero/core/test/unit_tests/mocks/mock_module.h" +#include "test_traits_common.h" + namespace L0 { namespace ult { @@ -46,9 +49,76 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, CommandListTests, whenCommandListIsCreatedThenPCAnd auto itorPc = find(cmdList.begin(), cmdList.end()); ASSERT_NE(cmdList.end(), itorPc); auto cmdPc = genCmdCast(*itorPc); - EXPECT_EQ(MemorySynchronizationCommands::getDcFlushEnable(true, *defaultHwInfo), cmdPc->getDcFlushEnable()); - EXPECT_TRUE(cmdPc->getCommandStreamerStallEnable()); + + EXPECT_TRUE(UnitTestHelper::getPipeControlHdcPipelineFlush(*cmdPc)); EXPECT_TRUE(cmdPc->getTextureCacheInvalidationEnable()); + EXPECT_TRUE(cmdPc->getCommandStreamerStallEnable()); + + auto itor = find(itorPc, cmdList.end()); + ASSERT_NE(cmdList.end(), itor); + + auto cmdSba = genCmdCast(*itor); + + auto dsh = commandContainer.getIndirectHeap(NEO::HeapType::DYNAMIC_STATE); + auto ssh = commandContainer.getIndirectHeap(NEO::HeapType::SURFACE_STATE); + + EXPECT_TRUE(cmdSba->getDynamicStateBaseAddressModifyEnable()); + EXPECT_TRUE(cmdSba->getDynamicStateBufferSizeModifyEnable()); + EXPECT_EQ(dsh->getHeapGpuBase(), cmdSba->getDynamicStateBaseAddress()); + EXPECT_EQ(dsh->getHeapSizeInPages(), cmdSba->getDynamicStateBufferSize()); + + EXPECT_TRUE(cmdSba->getSurfaceStateBaseAddressModifyEnable()); + EXPECT_EQ(ssh->getHeapGpuBase(), cmdSba->getSurfaceStateBaseAddress()); + + EXPECT_EQ(gmmHelper->getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CONST), cmdSba->getStatelessDataPortAccessMemoryObjectControlState()); + + EXPECT_TRUE(cmdSba->getDisableSupportForMultiGpuPartialWritesForStatelessMessages()); + EXPECT_TRUE(cmdSba->getDisableSupportForMultiGpuAtomicsForStatelessAccesses()); +} + +HWTEST2_F(CommandListTests, whenCommandListIsCreatedAndProgramExtendedPipeControlPriorToNonPipelinedStateCommandIsEnabledThenPCAndStateBaseAddressCmdsAreAddedAndCorrectlyProgrammed, IsAtLeastXeHpCore) { + using STATE_BASE_ADDRESS = typename FamilyType::STATE_BASE_ADDRESS; + using PIPE_CONTROL = typename FamilyType::PIPE_CONTROL; + + DebugManagerStateRestore restorer; + DebugManager.flags.ProgramExtendedPipeControlPriorToNonPipelinedStateCommand.set(1); + + ze_result_t returnValue; + std::unique_ptr commandList(CommandList::create(productFamily, device, NEO::EngineGroupType::Compute, 0u, returnValue)); + auto &commandContainer = commandList->commandContainer; + auto gmmHelper = commandContainer.getDevice()->getGmmHelper(); + + ASSERT_NE(nullptr, commandContainer.getCommandStream()); + auto usedSpaceBefore = commandContainer.getCommandStream()->getUsed(); + + auto result = commandList->close(); + ASSERT_EQ(ZE_RESULT_SUCCESS, result); + + auto usedSpaceAfter = commandContainer.getCommandStream()->getUsed(); + ASSERT_GT(usedSpaceAfter, usedSpaceBefore); + + GenCmdList cmdList; + ASSERT_TRUE(FamilyType::PARSE::parseCommandBuffer( + cmdList, ptrOffset(commandContainer.getCommandStream()->getCpuBase(), 0), usedSpaceAfter)); + + auto itorPc = find(cmdList.begin(), cmdList.end()); + ASSERT_NE(cmdList.end(), itorPc); + auto cmdPc = genCmdCast(*itorPc); + + EXPECT_TRUE(UnitTestHelper::getPipeControlHdcPipelineFlush(*cmdPc)); + EXPECT_TRUE(cmdPc->getTextureCacheInvalidationEnable()); + EXPECT_TRUE(cmdPc->getCommandStreamerStallEnable()); + + if constexpr (TestTraits::isPipeControlExtendedPriorToNonPipelinedStateCommandSupported) { + EXPECT_TRUE(cmdPc->getAmfsFlushEnable()); + EXPECT_TRUE(cmdPc->getInstructionCacheInvalidateEnable()); + EXPECT_TRUE(cmdPc->getConstantCacheInvalidationEnable()); + EXPECT_TRUE(cmdPc->getStateCacheInvalidationEnable()); + + if constexpr (TestTraits::isUnTypedDataPortCacheFlushSupported) { + EXPECT_TRUE(cmdPc->getUnTypedDataPortCacheFlush()); + } + } auto itor = find(itorPc, cmdList.end()); ASSERT_NE(cmdList.end(), itor); diff --git a/shared/source/command_container/CMakeLists.txt b/shared/source/command_container/CMakeLists.txt index 732bb1c18e..9cd4d3e540 100644 --- a/shared/source/command_container/CMakeLists.txt +++ b/shared/source/command_container/CMakeLists.txt @@ -1,5 +1,5 @@ # -# Copyright (C) 2019-2021 Intel Corporation +# Copyright (C) 2019-2022 Intel Corporation # # SPDX-License-Identifier: MIT # @@ -11,6 +11,7 @@ set(NEO_CORE_COMMAND_CONTAINER ${CMAKE_CURRENT_SOURCE_DIR}/command_encoder.h ${CMAKE_CURRENT_SOURCE_DIR}/command_encoder.inl ${CMAKE_CURRENT_SOURCE_DIR}/command_encoder_bdw_and_later.inl + ${CMAKE_CURRENT_SOURCE_DIR}/command_encoder_tgllp_and_later.inl ${CMAKE_CURRENT_SOURCE_DIR}/encode_compute_mode_bdw_and_later.inl ${CMAKE_CURRENT_SOURCE_DIR}/encode_compute_mode_tgllp_and_later.inl ${CMAKE_CURRENT_SOURCE_DIR}/implicit_scaling.cpp diff --git a/shared/source/command_container/command_encoder.h b/shared/source/command_container/command_encoder.h index e36286259d..6b989a1ce9 100644 --- a/shared/source/command_container/command_encoder.h +++ b/shared/source/command_container/command_encoder.h @@ -299,6 +299,8 @@ struct EncodeWA { static void addPipeControlPriorToNonPipelinedStateCommand(LinearStream &commandStream, PipeControlArgs args, const HardwareInfo &hwInfo, bool isRcs); static void setAdditionalPipeControlFlagsForNonPipelineStateCommand(PipeControlArgs &args); + + static void addPipeControlBeforeStateBaseAddress(LinearStream &commandStream, const HardwareInfo &hwInfo, bool isRcs); }; template diff --git a/shared/source/command_container/command_encoder_bdw_and_later.inl b/shared/source/command_container/command_encoder_bdw_and_later.inl index 64a68b3a2e..a2cf50edf5 100644 --- a/shared/source/command_container/command_encoder_bdw_and_later.inl +++ b/shared/source/command_container/command_encoder_bdw_and_later.inl @@ -423,6 +423,16 @@ inline void EncodeWA::addPipeControlPriorToNonPipelinedStateCommand(L MemorySynchronizationCommands::addPipeControl(commandStream, args); } +template +inline void EncodeWA::addPipeControlBeforeStateBaseAddress(LinearStream &commandStream, + const HardwareInfo &hwInfo, bool isRcs) { + PipeControlArgs args; + args.dcFlushEnable = MemorySynchronizationCommands::getDcFlushEnable(true, hwInfo); + args.textureCacheInvalidationEnable = true; + + NEO::EncodeWA::addPipeControlPriorToNonPipelinedStateCommand(commandStream, args, hwInfo, isRcs); +} + template inline void EncodeSurfaceState::encodeExtraBufferParams(EncodeSurfaceStateArgs &args) { auto surfaceState = reinterpret_cast(args.outMemory); diff --git a/shared/source/command_stream/command_stream_receiver_hw_tgllp_and_later.inl b/shared/source/command_container/command_encoder_tgllp_and_later.inl similarity index 51% rename from shared/source/command_stream/command_stream_receiver_hw_tgllp_and_later.inl rename to shared/source/command_container/command_encoder_tgllp_and_later.inl index f46d653f65..693258edbd 100644 --- a/shared/source/command_stream/command_stream_receiver_hw_tgllp_and_later.inl +++ b/shared/source/command_container/command_encoder_tgllp_and_later.inl @@ -1,26 +1,27 @@ /* - * Copyright (C) 2019-2022 Intel Corporation + * Copyright (C) 2020-2022 Intel Corporation * * SPDX-License-Identifier: MIT * */ +#pragma once #include "shared/source/command_container/command_encoder.h" -#include "shared/source/command_stream/command_stream_receiver_hw.h" -#include "shared/source/device/device.h" +#include "shared/source/command_stream/linear_stream.h" +#include "shared/source/helpers/hw_helper.h" #include "shared/source/helpers/pipe_control_args.h" -#include "shared/source/os_interface/hw_info_config.h" namespace NEO { template <> -inline void CommandStreamReceiverHw::addPipeControlBeforeStateBaseAddress(LinearStream &commandStream) { +void EncodeWA::addPipeControlBeforeStateBaseAddress(LinearStream &commandStream, + const HardwareInfo &hwInfo, bool isRcs) { PipeControlArgs args; - args.dcFlushEnable = MemorySynchronizationCommands::getDcFlushEnable(true, peekHwInfo()); + args.dcFlushEnable = MemorySynchronizationCommands::getDcFlushEnable(true, hwInfo); args.textureCacheInvalidationEnable = true; args.hdcPipelineFlush = true; - NEO::EncodeWA::addPipeControlPriorToNonPipelinedStateCommand(commandStream, args, peekHwInfo(), isRcs()); + NEO::EncodeWA::addPipeControlPriorToNonPipelinedStateCommand(commandStream, args, hwInfo, isRcs); } } // namespace NEO diff --git a/shared/source/command_stream/CMakeLists.txt b/shared/source/command_stream/CMakeLists.txt index d58ecf653c..0a4ba43b4b 100644 --- a/shared/source/command_stream/CMakeLists.txt +++ b/shared/source/command_stream/CMakeLists.txt @@ -17,7 +17,6 @@ set(NEO_CORE_COMMAND_STREAM ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_receiver_hw.h ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_receiver_hw_base.inl ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_receiver_hw_bdw_and_later.inl - ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_receiver_hw_tgllp_and_later.inl ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_receiver_simulated_common_hw.h ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_receiver_simulated_common_hw_base.inl ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_receiver_simulated_common_hw_bdw_and_later.inl diff --git a/shared/source/command_stream/command_stream_receiver_hw.h b/shared/source/command_stream/command_stream_receiver_hw.h index de40e9ce12..d38c37fea1 100644 --- a/shared/source/command_stream/command_stream_receiver_hw.h +++ b/shared/source/command_stream/command_stream_receiver_hw.h @@ -166,7 +166,6 @@ class CommandStreamReceiverHw : public CommandStreamReceiver { size_t getCmdSizeForPrologue() const; void addClearSLMWorkAround(typename GfxFamily::PIPE_CONTROL *pCmd); - void addPipeControlBeforeStateBaseAddress(LinearStream &commandStream); void addPipeControlBeforeStateSip(LinearStream &commandStream, Device &device); void addPipeControlBefore3dState(LinearStream &commandStream, DispatchFlags &dispatchFlags); size_t getSshHeapSize(); diff --git a/shared/source/command_stream/command_stream_receiver_hw_base.inl b/shared/source/command_stream/command_stream_receiver_hw_base.inl index 575343f7de..1fa88860b2 100644 --- a/shared/source/command_stream/command_stream_receiver_hw_base.inl +++ b/shared/source/command_stream/command_stream_receiver_hw_base.inl @@ -375,7 +375,7 @@ CompletionStamp CommandStreamReceiverHw::flushTask( //Reprogram state base address if required if (isStateBaseAddressDirty || sourceLevelDebuggerActive) { - addPipeControlBeforeStateBaseAddress(commandStreamCSR); + EncodeWA::addPipeControlBeforeStateBaseAddress(commandStreamCSR, hwInfo, isRcs()); EncodeWA::encodeAdditionalPipelineSelect(commandStreamCSR, dispatchFlags.pipelineSelectArgs, true, hwInfo, isRcs()); uint64_t newGSHbase = 0; diff --git a/shared/source/command_stream/command_stream_receiver_hw_bdw_and_later.inl b/shared/source/command_stream/command_stream_receiver_hw_bdw_and_later.inl index babbb05961..58b5158784 100644 --- a/shared/source/command_stream/command_stream_receiver_hw_bdw_and_later.inl +++ b/shared/source/command_stream/command_stream_receiver_hw_bdw_and_later.inl @@ -90,15 +90,6 @@ bool CommandStreamReceiverHw::isMultiOsContextCapable() const { return false; } -template -inline void CommandStreamReceiverHw::addPipeControlBeforeStateBaseAddress(LinearStream &commandStream) { - PipeControlArgs args; - args.dcFlushEnable = MemorySynchronizationCommands::getDcFlushEnable(true, peekHwInfo()); - args.textureCacheInvalidationEnable = true; - - NEO::EncodeWA::addPipeControlPriorToNonPipelinedStateCommand(commandStream, args, peekHwInfo(), isRcs()); -} - template inline void CommandStreamReceiverHw::addPipeControlBeforeStateSip(LinearStream &commandStream, Device &device) {} diff --git a/shared/source/gen12lp/command_encoder_gen12lp.cpp b/shared/source/gen12lp/command_encoder_gen12lp.cpp index 9555a3cdb5..e66fd6e780 100644 --- a/shared/source/gen12lp/command_encoder_gen12lp.cpp +++ b/shared/source/gen12lp/command_encoder_gen12lp.cpp @@ -16,6 +16,7 @@ using Family = NEO::TGLLPFamily; #include "shared/source/command_container/command_encoder.inl" #include "shared/source/command_container/command_encoder_bdw_and_later.inl" +#include "shared/source/command_container/command_encoder_tgllp_and_later.inl" #include "shared/source/command_container/encode_compute_mode_tgllp_and_later.inl" #include "shared/source/command_container/image_surface_state/compression_params_bdw_and_later.inl" #include "shared/source/command_container/image_surface_state/compression_params_tgllp_and_later.inl" diff --git a/shared/source/gen12lp/command_stream_receiver_hw_gen12lp.cpp b/shared/source/gen12lp/command_stream_receiver_hw_gen12lp.cpp index 45af5acadb..8bd53817b6 100644 --- a/shared/source/gen12lp/command_stream_receiver_hw_gen12lp.cpp +++ b/shared/source/gen12lp/command_stream_receiver_hw_gen12lp.cpp @@ -10,7 +10,6 @@ using Family = NEO::TGLLPFamily; #include "shared/source/command_stream/command_stream_receiver_hw_bdw_and_later.inl" -#include "shared/source/command_stream/command_stream_receiver_hw_tgllp_and_later.inl" #include "shared/source/command_stream/device_command_stream.h" #include "shared/source/helpers/blit_commands_helper_bdw_and_later.inl" #include "shared/source/helpers/populate_factory.h" diff --git a/shared/source/xe_hp_core/command_encoder_xe_hp_core.cpp b/shared/source/xe_hp_core/command_encoder_xe_hp_core.cpp index af9cc95d74..5b01283f33 100644 --- a/shared/source/xe_hp_core/command_encoder_xe_hp_core.cpp +++ b/shared/source/xe_hp_core/command_encoder_xe_hp_core.cpp @@ -13,11 +13,9 @@ #include "shared/source/helpers/hw_helper.h" #include "shared/source/xe_hp_core/hw_cmds_base.h" -namespace NEO { - -using Family = XeHpFamily; -} +using Family = NEO::XeHpFamily; +#include "shared/source/command_container/command_encoder_tgllp_and_later.inl" #include "shared/source/command_container/image_surface_state/compression_params_tgllp_and_later.inl" #include "shared/source/command_container/image_surface_state/compression_params_xehp_and_later.inl" diff --git a/shared/source/xe_hp_core/command_stream_receiver_hw_xe_hp_core.cpp b/shared/source/xe_hp_core/command_stream_receiver_hw_xe_hp_core.cpp index 7a142a6374..8163a88435 100644 --- a/shared/source/xe_hp_core/command_stream_receiver_hw_xe_hp_core.cpp +++ b/shared/source/xe_hp_core/command_stream_receiver_hw_xe_hp_core.cpp @@ -10,7 +10,6 @@ using Family = NEO::XeHpFamily; -#include "shared/source/command_stream/command_stream_receiver_hw_tgllp_and_later.inl" #include "shared/source/command_stream/command_stream_receiver_hw_xehp_and_later.inl" #include "shared/source/helpers/blit_commands_helper_xehp_and_later.inl" #include "shared/source/helpers/populate_factory.h" diff --git a/shared/source/xe_hpc_core/command_encoder_xe_hpc_core.cpp b/shared/source/xe_hpc_core/command_encoder_xe_hpc_core.cpp index ab604ceb0b..743cabf3ba 100644 --- a/shared/source/xe_hpc_core/command_encoder_xe_hpc_core.cpp +++ b/shared/source/xe_hpc_core/command_encoder_xe_hpc_core.cpp @@ -14,11 +14,9 @@ #include "shared/source/kernel/grf_config.h" #include "shared/source/xe_hpc_core/hw_cmds_base.h" -namespace NEO { - -using Family = XE_HPC_COREFamily; -} +using Family = NEO::XE_HPC_COREFamily; +#include "shared/source/command_container/command_encoder_tgllp_and_later.inl" #include "shared/source/command_container/command_encoder_xe_hpg_core_and_later.inl" #include "shared/source/command_container/image_surface_state/compression_params_tgllp_and_later.inl" #include "shared/source/command_container/image_surface_state/compression_params_xehp_and_later.inl" diff --git a/shared/source/xe_hpc_core/command_stream_receiver_hw_xe_hpc_core.cpp b/shared/source/xe_hpc_core/command_stream_receiver_hw_xe_hpc_core.cpp index 1fbfef0de3..067fbefbe8 100644 --- a/shared/source/xe_hpc_core/command_stream_receiver_hw_xe_hpc_core.cpp +++ b/shared/source/xe_hpc_core/command_stream_receiver_hw_xe_hpc_core.cpp @@ -12,7 +12,6 @@ using Family = NEO::XE_HPC_COREFamily; #include "shared/source/command_stream/command_stream_receiver_hw_dg2_and_later.inl" -#include "shared/source/command_stream/command_stream_receiver_hw_tgllp_and_later.inl" #include "shared/source/command_stream/command_stream_receiver_hw_xehp_and_later.inl" #include "shared/source/helpers/blit_commands_helper_xehp_and_later.inl" #include "shared/source/helpers/populate_factory.h" diff --git a/shared/source/xe_hpg_core/command_encoder_xe_hpg_core.cpp b/shared/source/xe_hpg_core/command_encoder_xe_hpg_core.cpp index ddcddba5ea..5be0c108fe 100644 --- a/shared/source/xe_hpg_core/command_encoder_xe_hpg_core.cpp +++ b/shared/source/xe_hpg_core/command_encoder_xe_hpg_core.cpp @@ -13,11 +13,9 @@ #include "shared/source/os_interface/hw_info_config.h" #include "shared/source/xe_hpg_core/hw_cmds_base.h" -namespace NEO { - -using Family = XE_HPG_COREFamily; -} +using Family = NEO::XE_HPG_COREFamily; +#include "shared/source/command_container/command_encoder_tgllp_and_later.inl" #include "shared/source/command_container/command_encoder_xe_hpg_core_and_later.inl" #include "shared/source/command_container/image_surface_state/compression_params_tgllp_and_later.inl" #include "shared/source/command_container/image_surface_state/compression_params_xehp_and_later.inl" diff --git a/shared/source/xe_hpg_core/command_stream_receiver_hw_xe_hpg_core.cpp b/shared/source/xe_hpg_core/command_stream_receiver_hw_xe_hpg_core.cpp index 1f28b9a146..42ec5c9b3d 100644 --- a/shared/source/xe_hpg_core/command_stream_receiver_hw_xe_hpg_core.cpp +++ b/shared/source/xe_hpg_core/command_stream_receiver_hw_xe_hpg_core.cpp @@ -11,7 +11,6 @@ using Family = NEO::XE_HPG_COREFamily; #include "shared/source/command_stream/command_stream_receiver_hw_dg2_and_later.inl" -#include "shared/source/command_stream/command_stream_receiver_hw_tgllp_and_later.inl" #include "shared/source/command_stream/command_stream_receiver_hw_xehp_and_later.inl" #include "shared/source/helpers/blit_commands_helper_xehp_and_later.inl" #include "shared/source/helpers/populate_factory.h" diff --git a/shared/test/common/xe_hp_core/test_traits_xe_hp_core.h b/shared/test/common/xe_hp_core/test_traits_xe_hp_core.h index 300587cccc..19edd1c7b5 100644 --- a/shared/test/common/xe_hp_core/test_traits_xe_hp_core.h +++ b/shared/test/common/xe_hp_core/test_traits_xe_hp_core.h @@ -28,4 +28,5 @@ struct TestTraits { static constexpr bool forceGpuNonCoherent = false; static constexpr bool isUnTypedDataPortCacheFlushSupported = false; static constexpr bool imagesSupported = true; + static constexpr bool isPipeControlExtendedPriorToNonPipelinedStateCommandSupported = true; }; diff --git a/shared/test/common/xe_hpc_core/test_traits_xe_hpc_core.h b/shared/test/common/xe_hpc_core/test_traits_xe_hpc_core.h index b7326a961c..3759ca0775 100644 --- a/shared/test/common/xe_hpc_core/test_traits_xe_hpc_core.h +++ b/shared/test/common/xe_hpc_core/test_traits_xe_hpc_core.h @@ -28,4 +28,5 @@ struct TestTraits { static constexpr bool forceGpuNonCoherent = false; static constexpr bool isUnTypedDataPortCacheFlushSupported = true; static constexpr bool imagesSupported = false; + static constexpr bool isPipeControlExtendedPriorToNonPipelinedStateCommandSupported = true; }; diff --git a/shared/test/common/xe_hpg_core/dg2/test_traits_dg2.h b/shared/test/common/xe_hpg_core/dg2/test_traits_dg2.h index 4684700b6c..ae69dd9be6 100644 --- a/shared/test/common/xe_hpg_core/dg2/test_traits_dg2.h +++ b/shared/test/common/xe_hpg_core/dg2/test_traits_dg2.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2021 Intel Corporation + * Copyright (C) 2021-2022 Intel Corporation * * SPDX-License-Identifier: MIT * @@ -11,4 +11,6 @@ template <> struct TestTraitsPlatforms { static constexpr bool programOnlyChangedFieldsInComputeStateMode = false; + static constexpr bool isPipeControlExtendedPriorToNonPipelinedStateCommandSupported = true; + static constexpr bool isUnTypedDataPortCacheFlushSupported = true; }; diff --git a/shared/test/common/xe_hpg_core/test_traits_xe_hpg_core.h b/shared/test/common/xe_hpg_core/test_traits_xe_hpg_core.h index 6169a73164..18f805ca25 100644 --- a/shared/test/common/xe_hpg_core/test_traits_xe_hpg_core.h +++ b/shared/test/common/xe_hpg_core/test_traits_xe_hpg_core.h @@ -28,4 +28,5 @@ struct TestTraits { static constexpr bool forceGpuNonCoherent = false; static constexpr bool isUnTypedDataPortCacheFlushSupported = true; static constexpr bool imagesSupported = true; + static constexpr bool isPipeControlExtendedPriorToNonPipelinedStateCommandSupported = false; };