feature: add support for releases 20.1, 20.4

Related-To: NEO-8188, NEO-10774

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
This commit is contained in:
Mateusz Jablonski
2024-06-03 15:09:01 +00:00
committed by Compute-Runtime-Automation
parent 031609e638
commit f29d43ac70
11 changed files with 8305 additions and 1 deletions

View File

@@ -0,0 +1,185 @@
/*
* Copyright (C) 2024 Intel Corporation
*
* SPDX-License-Identifier: MIT
*
*/
#pragma once
#include "shared/source/commands/bxml_generator_glue.h"
#include "shared/source/helpers/debug_helpers.h"
#include <cstring>
#include <igfxfmid.h>
#include <type_traits>
template <class T>
struct CmdParse;
namespace NEO {
struct Xe2HpgCore {
#include "shared/source/generated/xe2_hpg_core/hw_cmds_generated_xe2_hpg_core.inl"
static constexpr uint32_t stateComputeModeEuThreadSchedulingModeOverrideMask = (0b11u << 13);
static constexpr uint32_t stateComputeModeLargeGrfModeMask = (1u << 15);
// DW2
static constexpr uint32_t stateComputeModeMemoryAllocationForScratchAndMidthreadPreemptionBuffersMask = (1u << 11);
static constexpr bool isUsingL3Control = false;
static constexpr bool isUsingMediaSamplerDopClockGate = false;
static constexpr bool supportsSampler = true;
static constexpr bool isUsingGenericMediaStateClear = false;
static constexpr bool isUsingMiMemFence = true;
static constexpr bool isUsingMiSetPredicate = true;
static constexpr bool isUsingMiMathMocs = true;
static constexpr uint32_t bcsEngineCount = 9u;
static constexpr uint32_t timestampPacketCount = 1u;
struct FrontEndStateSupport {
static constexpr bool scratchSize = true;
static constexpr bool privateScratchSize = true;
static constexpr bool computeDispatchAllWalker = false;
static constexpr bool disableEuFusion = false;
static constexpr bool disableOverdispatch = true;
static constexpr bool singleSliceDispatchCcsMode = true;
};
struct StateComputeModeStateSupport {
static constexpr bool threadArbitrationPolicy = true;
static constexpr bool coherencyRequired = true;
static constexpr bool largeGrfMode = true;
static constexpr bool zPassAsyncComputeThreadLimit = false;
static constexpr bool pixelAsyncComputeThreadLimit = false;
static constexpr bool devicePreemptionMode = false;
static constexpr bool allocationForScratchAndMidthreadPreemption = true;
};
struct StateBaseAddressStateSupport {
static constexpr bool bindingTablePoolBaseAddress = true;
};
struct PipelineSelectStateSupport {
static constexpr bool mediaSamplerDopClockGate = false;
static constexpr bool systolicMode = false;
};
struct PreemptionDebugSupport {
static constexpr bool preemptionMode = false;
static constexpr bool stateSip = true;
static constexpr bool csrSurface = true;
};
struct DataPortBindlessSurfaceExtendedMessageDescriptor {
union {
struct {
uint32_t bindlessSurfaceOffset : 25;
uint32_t reserved : 6;
};
uint32_t packed;
};
DataPortBindlessSurfaceExtendedMessageDescriptor() {
packed = 0;
}
void setBindlessSurfaceOffset(uint32_t offsetInBindlessSurfaceHeapInBytes) {
bindlessSurfaceOffset = offsetInBindlessSurfaceHeapInBytes >> 6;
}
uint32_t getBindlessSurfaceOffsetToPatch() {
return bindlessSurfaceOffset << 6;
}
};
static_assert(sizeof(DataPortBindlessSurfaceExtendedMessageDescriptor) == sizeof(DataPortBindlessSurfaceExtendedMessageDescriptor::packed), "");
};
struct Xe2HpgCoreFamily : public Xe2HpgCore {
using Parse = CmdParse<Xe2HpgCoreFamily>;
using GfxFamily = Xe2HpgCoreFamily;
using DefaultWalkerType = COMPUTE_WALKER;
using FrontEndStateCommand = CFE_STATE;
using XY_BLOCK_COPY_BLT = typename GfxFamily::XY_BLOCK_COPY_BLT;
using XY_COPY_BLT = typename GfxFamily::MEM_COPY;
using XY_COLOR_BLT = typename GfxFamily::XY_FAST_COLOR_BLT;
using MI_STORE_REGISTER_MEM_CMD = typename GfxFamily::MI_STORE_REGISTER_MEM;
using TimestampPacketType = uint64_t;
static const COMPUTE_WALKER cmdInitGpgpuWalker;
static const CFE_STATE cmdInitCfeState;
static const INTERFACE_DESCRIPTOR_DATA cmdInitInterfaceDescriptorData;
static const MI_BATCH_BUFFER_END cmdInitBatchBufferEnd;
static const MI_BATCH_BUFFER_START cmdInitBatchBufferStart;
static const PIPE_CONTROL cmdInitPipeControl;
static const STATE_COMPUTE_MODE cmdInitStateComputeMode;
static const _3DSTATE_BINDING_TABLE_POOL_ALLOC cmdInitStateBindingTablePoolAlloc;
static const MI_SEMAPHORE_WAIT cmdInitMiSemaphoreWait;
static const RENDER_SURFACE_STATE cmdInitRenderSurfaceState;
static const POSTSYNC_DATA cmdInitPostSyncData;
static const MI_SET_PREDICATE cmdInitSetPredicate;
static const MI_LOAD_REGISTER_IMM cmdInitLoadRegisterImm;
static const MI_LOAD_REGISTER_REG cmdInitLoadRegisterReg;
static const MI_LOAD_REGISTER_MEM cmdInitLoadRegisterMem;
static const MI_STORE_DATA_IMM cmdInitStoreDataImm;
static const MI_STORE_REGISTER_MEM cmdInitStoreRegisterMem;
static const MI_NOOP cmdInitNoop;
static const MI_REPORT_PERF_COUNT cmdInitReportPerfCount;
static const MI_ATOMIC cmdInitAtomic;
static const PIPELINE_SELECT cmdInitPipelineSelect;
static const MI_ARB_CHECK cmdInitArbCheck;
static const STATE_BASE_ADDRESS cmdInitStateBaseAddress;
static const MEDIA_SURFACE_STATE cmdInitMediaSurfaceState;
static const SAMPLER_STATE cmdInitSamplerState;
static const BINDING_TABLE_STATE cmdInitBindingTableState;
static const MI_USER_INTERRUPT cmdInitUserInterrupt;
static const MI_CONDITIONAL_BATCH_BUFFER_END cmdInitConditionalBatchBufferEnd;
static const MI_FLUSH_DW cmdInitMiFlushDw;
static const XY_BLOCK_COPY_BLT cmdInitXyBlockCopyBlt;
static const MEM_COPY cmdInitXyCopyBlt;
static const XY_FAST_COLOR_BLT cmdInitXyColorBlt;
static const STATE_PREFETCH cmdInitStatePrefetch;
static const _3DSTATE_BTD cmd3dStateBtd;
static const _3DSTATE_BTD_BODY cmd3dStateBtdBody;
static const MI_MEM_FENCE cmdInitMemFence;
static const MEM_SET cmdInitMemSet;
static const STATE_SIP cmdInitStateSip;
static const STATE_CONTEXT_DATA_BASE_ADDRESS cmdInitStateContextDataBaseAddress;
static const STATE_SYSTEM_MEM_FENCE_ADDRESS cmdInitStateSystemMemFenceAddress;
static constexpr bool isQwordInOrderCounter = false;
static constexpr bool walkerPostSyncSupport = true;
static constexpr size_t indirectDataAlignment = COMPUTE_WALKER::INDIRECTDATASTARTADDRESS_ALIGN_SIZE;
static constexpr bool supportsCmdSet(GFXCORE_FAMILY cmdSetBaseFamily) {
return cmdSetBaseFamily == IGFX_XE_HP_CORE;
}
template <typename WalkerType = DefaultWalkerType>
static constexpr size_t getInterfaceDescriptorSize() {
return sizeof(INTERFACE_DESCRIPTOR_DATA);
}
template <typename WalkerType = DefaultWalkerType>
static WalkerType getInitGpuWalker() {
return cmdInitGpgpuWalker;
}
template <typename InterfaceDescriptorType>
static InterfaceDescriptorType getInitInterfaceDescriptor() {
return cmdInitInterfaceDescriptorData;
}
template <typename WalkerType>
static constexpr bool isHeaplessMode() {
return false;
}
};
enum class MemoryCompressionState;
template <typename GfxFamily>
void setSbaStatelessCompressionParams(typename GfxFamily::STATE_BASE_ADDRESS *stateBaseAddress,
MemoryCompressionState memoryCompressionState);
template <>
void setSbaStatelessCompressionParams<Xe2HpgCoreFamily>(typename Xe2HpgCoreFamily::STATE_BASE_ADDRESS *stateBaseAddress,
MemoryCompressionState memoryCompressionState);
} // namespace NEO