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Refactor store register mem encoder to include partition parameter
Related-To: NEO-6811 Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
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Compute-Runtime-Automation
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76289be8c1
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f4407064a4
@@ -159,7 +159,8 @@ struct EncodeMathMMIO {
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static void encodeBitwiseAndVal(CommandContainer &container,
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uint32_t regOffset,
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uint32_t immVal,
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uint64_t dstAddress);
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uint64_t dstAddress,
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bool workloadPartition);
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static void encodeAlu(MI_MATH_ALU_INST_INLINE *pAluParam, AluRegisters srcA, AluRegisters srcB, AluRegisters op, AluRegisters dest, AluRegisters result);
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@@ -242,13 +243,9 @@ struct EncodeStoreMMIO {
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using MI_STORE_REGISTER_MEM = typename GfxFamily::MI_STORE_REGISTER_MEM;
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static const size_t size = sizeof(MI_STORE_REGISTER_MEM);
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static void encode(LinearStream &csr, uint32_t offset, uint64_t address);
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static void remapOffset(MI_STORE_REGISTER_MEM *pStoreRegMem);
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};
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template <typename GfxFamily>
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struct AppendStoreMMIO {
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using MI_STORE_REGISTER_MEM = typename GfxFamily::MI_STORE_REGISTER_MEM;
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static void appendRemap(MI_STORE_REGISTER_MEM *cmd);
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static void encode(LinearStream &csr, uint32_t offset, uint64_t address, bool workloadPartition);
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static void encode(MI_STORE_REGISTER_MEM *cmdBuffer, uint32_t offset, uint64_t address, bool workloadPartition);
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static void appendFlags(MI_STORE_REGISTER_MEM *storeRegMem, bool workloadPartition);
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};
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template <typename GfxFamily>
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