mirror of
https://github.com/intel/compute-runtime.git
synced 2026-01-13 18:23:03 +08:00
Clean obsolete code.
Change-Id: I9551f7217924c7ea8f44a3322fc3096252c4d6f7
This commit is contained in:
Mrozek, Michal
committed by
sys_ocldev
sys_ocldev
parent
df1d4a76f1
commit
f90ebac12a
@@ -33,5 +33,4 @@ target_sources(igdrcl_aub_tests PUBLIC
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"${CMAKE_CURRENT_SOURCE_DIR}/enqueue_write_buffer_aub_tests.cpp"
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"${CMAKE_CURRENT_SOURCE_DIR}/enqueue_write_buffer_rect_aub_tests.cpp"
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"${CMAKE_CURRENT_SOURCE_DIR}/enqueue_write_image_aub_tests.cpp"
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"${CMAKE_CURRENT_SOURCE_DIR}/run_kernel_aub_tests.cpp"
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)
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@@ -1,250 +0,0 @@
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/*
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* Copyright (c) 2017, Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "runtime/memory_manager/surface.h"
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#include "unit_tests/fixtures/run_kernel_fixture.h"
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#include "unit_tests/fixtures/two_walker_fixture.h"
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#include "unit_tests/aub_tests/fixtures/run_kernel_fixture.h"
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#include "CL/cl_ext.h"
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#include "CL/cl.h"
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#include "public/cl_vebox_intel.h"
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using namespace OCLRT;
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namespace ULT {
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class AUBRunKernelIntegrateTest : public RunKernelFixture<AUBRunKernelFixtureFactory>,
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public ::testing::Test {
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typedef RunKernelFixture<AUBRunKernelFixtureFactory> ParentClass;
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void SetUp() override {
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ParentClass::SetUp();
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}
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void TearDown() override {
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ParentClass::TearDown();
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}
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};
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TEST_F(AUBRunKernelIntegrateTest, VeBoxHotPixel) {
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auto retVal = CL_INVALID_VALUE;
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const cl_int testWidth = 16;
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const cl_int testHeight = 16;
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cl_device_id device = pDevice;
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overwriteBuiltInBinaryName(pDevice, "media_kernels_frontend");
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cl_program ve_program = clCreateProgramWithBuiltInKernels(
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context,
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1,
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&device,
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"ve_enhance_intel;",
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&retVal);
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restoreBuiltInBinaryName(pDevice);
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ASSERT_EQ(retVal, CL_SUCCESS);
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auto pProgram = castToObject<Program>(ve_program);
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auto pKernel = Kernel::create<MockKernel>(pProgram, *pProgram->getKernelInfo("ve_enhance_intel"), &retVal);
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cl_kernel ve_kernel = pKernel;
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ASSERT_EQ(retVal, CL_SUCCESS);
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cl_ve_hpc_attrib_intel HPCConfig = {true, 0, 0};
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cl_ve_attrib_desc_intel attrib = {
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CL_VE_ACCELERATOR_ATTRIB_HPC_INTEL,
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&HPCConfig};
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cl_ve_desc_intel desc = {1, &attrib};
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cl_accelerator_intel accelerator = nullptr;
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accelerator = clCreateAcceleratorINTEL(
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context,
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CL_ACCELERATOR_TYPE_VE_INTEL,
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sizeof(cl_ve_desc_intel),
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&desc,
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&retVal);
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ASSERT_EQ(retVal, CL_SUCCESS);
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ASSERT_NE(accelerator, nullptr);
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// NV12 on input
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int inputBpp = 12;
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// 32bit RGBA on output
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int outputBpp = 32;
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const int INPUT_SIZE = (testWidth * testHeight * inputBpp) / 8;
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ASSERT_GT(INPUT_SIZE, 0);
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const int Y_SIZE = testWidth * testHeight;
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ASSERT_GT(Y_SIZE, 0);
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const int UV_SIZE = INPUT_SIZE - Y_SIZE;
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ASSERT_GT(UV_SIZE, 0);
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const int OUTPUT_SIZE = (testWidth * testHeight * outputBpp) / 8;
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ASSERT_GT(OUTPUT_SIZE, 0);
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auto srcMemory = (cl_uchar *)::alignedMalloc(INPUT_SIZE, 4);
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ASSERT_NE(srcMemory, nullptr);
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memset(srcMemory, 0x00, INPUT_SIZE);
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// Init sample input (in sync with MICRO_VEBOX SLT test)
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// Luma:
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for (int i = 0; i < 7; i++) {
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srcMemory[2 * testWidth + 3 + i] = 0xFD;
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srcMemory[3 * testWidth + 5 + i] = 0xFD;
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srcMemory[10 * testWidth + 3 + i] = 0xFD;
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srcMemory[12 * testWidth + 5 + i] = 0xFD;
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srcMemory[13 * testWidth + 2 + i] = 0xFD;
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}
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srcMemory[12 * testWidth + 12] = 0xFD;
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srcMemory[13 * testWidth + 9] = 0xFD;
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// Chroma:
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memset(srcMemory + Y_SIZE, 0x80, UV_SIZE);
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cl_image_format inputFormatNV12;
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inputFormatNV12.image_channel_order = CL_NV12_INTEL;
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inputFormatNV12.image_channel_data_type = CL_UNORM_INT8;
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cl_image_format inputFormatY;
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inputFormatY.image_channel_order = CL_R;
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inputFormatY.image_channel_data_type = CL_UNORM_INT8;
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cl_image_format inputFormatUV;
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inputFormatUV.image_channel_order = CL_RG;
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inputFormatUV.image_channel_data_type = CL_UNORM_INT8;
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cl_image_format outputFormat;
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outputFormat.image_channel_order = CL_RGBA;
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outputFormat.image_channel_data_type = CL_UNORM_INT8;
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cl_image_desc imageDesc;
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imageDesc.image_type = CL_MEM_OBJECT_IMAGE2D;
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imageDesc.image_width = testWidth;
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imageDesc.image_height = testHeight;
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imageDesc.image_depth = 1;
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imageDesc.image_array_size = 1;
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imageDesc.image_row_pitch = testWidth;
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imageDesc.image_slice_pitch = 0;
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imageDesc.num_mip_levels = 0;
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imageDesc.num_samples = 0;
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imageDesc.mem_object = nullptr;
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cl_image_desc imageDescY = imageDesc;
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imageDescY.image_depth = 0;
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cl_image_desc imageDescUV = imageDesc;
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imageDescUV.image_width /= 2;
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imageDescUV.image_height /= 2;
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cl_mem_flags flagsNV12 = CL_MEM_NO_ACCESS_INTEL | CL_MEM_HOST_NO_ACCESS | CL_MEM_ACCESS_FLAGS_UNRESTRICTED_INTEL;
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auto surfaceFormatNV12 = Image::getSurfaceFormatFromTable(flagsNV12, &inputFormatNV12);
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auto srcImage = Image::create(
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context,
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flagsNV12,
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surfaceFormatNV12,
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&imageDesc,
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nullptr,
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retVal);
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ASSERT_NE(nullptr, srcImage);
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cl_mem_flags flagsY = CL_MEM_READ_WRITE;
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auto surfaceFormatY = Image::getSurfaceFormatFromTable(flagsY, &inputFormatY);
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auto srcPlaneY = Image::create(
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context,
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flagsY,
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surfaceFormatY,
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&imageDescY,
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nullptr,
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retVal);
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ASSERT_NE(nullptr, srcPlaneY);
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cl_mem_flags flagsUV = CL_MEM_READ_WRITE;
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auto surfaceFormatUV = Image::getSurfaceFormatFromTable(flagsUV, &inputFormatUV);
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auto srcPlaneUV = Image::create(
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context,
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flagsUV,
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surfaceFormatUV,
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&imageDescUV,
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nullptr,
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retVal);
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ASSERT_NE(nullptr, srcPlaneUV);
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cl_mem_flags flagsOut = CL_MEM_READ_WRITE;
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auto surfaceFormatOut = Image::getSurfaceFormatFromTable(flagsOut, &outputFormat);
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auto dstImage = Image::create(
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context,
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flagsOut,
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surfaceFormatOut,
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&imageDesc,
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nullptr,
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retVal);
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ASSERT_NE(nullptr, dstImage);
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cl_int flags = 0;
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cl_mem arg2 = srcImage;
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cl_mem arg3 = dstImage;
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retVal = clSetKernelArg(ve_kernel, 0, sizeof(cl_accelerator_intel), &accelerator);
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ASSERT_EQ(CL_SUCCESS, retVal);
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retVal = clSetKernelArg(ve_kernel, 1, sizeof(cl_int), &flags);
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ASSERT_EQ(CL_SUCCESS, retVal);
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retVal = clSetKernelArg(ve_kernel, 2, sizeof(cl_mem), &arg2);
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ASSERT_EQ(CL_SUCCESS, retVal);
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retVal = clSetKernelArg(ve_kernel, 3, sizeof(cl_mem), &arg3);
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ASSERT_EQ(CL_SUCCESS, retVal);
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CommandQueue *pVeCmdQ = createCommandQueue(
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pDevice,
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CL_QUEUE_VE_ENABLE_INTEL);
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ASSERT_NE(nullptr, pVeCmdQ);
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const cl_uint workDim = 1;
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const size_t globalWorkOffset[3] = {0, 0, 0};
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const size_t globalWorkSize[3] = {testWidth, testHeight, 1};
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const size_t localWorkSize[3] = {testWidth, testHeight, 1};
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cl_uint numEventsInWaitList = 0;
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retVal = pVeCmdQ->enqueueKernel(
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ve_kernel,
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workDim,
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globalWorkOffset,
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globalWorkSize,
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localWorkSize,
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numEventsInWaitList,
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nullptr,
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nullptr);
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ASSERT_EQ(CL_SUCCESS, retVal);
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::alignedFree(srcMemory);
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clReleaseMemObject(srcPlaneY);
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clReleaseMemObject(srcPlaneUV);
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clReleaseMemObject(srcImage);
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clReleaseMemObject(dstImage);
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clReleaseCommandQueue(pVeCmdQ);
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clReleaseAcceleratorINTEL(accelerator);
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clReleaseKernel(ve_kernel);
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clReleaseProgram(ve_program);
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}
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} // namespace ULT
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