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Commit Graph

196 Commits

Author SHA1 Message Date
Aravind Gopalakrishnan
16f2fbbc37 [9/n] L0 immediate commandlist improvements 
Add HwInfo utility for more fine-grained flush task enablement
Related-To: LOCI-1988

Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
 2022-02-18 19:51:28 +01:00
Aravind Gopalakrishnan
74cdd60255 [7/n] L0 immediate commandlist improvements 
Enable flushTask only for specific families for now

Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
 2022-02-15 18:43:30 +01:00
Maciej Plewka
9d8ce7aace Command container appends BB_END on cmd buffer allocation end 
When linear stream created for command container has not enough space
for command and BB_END it will program BB_END and allocate new command
buffer allocation. Pointer returned from getSpace in this case will
return storage from new command buffer allocation.

Related-To: NEO-5707

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2022-01-31 16:15:37 +01:00
Zbigniew Zdanowicz
a7455b5767 Add tweaks and control flags to linux completion fence 
Related-To: NEO-6575

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-01-21 13:41:23 +01:00
Michal Mrozek
27c43b27f3 Remove not needed method. 
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2022-01-20 15:02:19 +01:00
Zbigniew Zdanowicz
4238679078 Refactor implicit scaling device support 
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-01-18 13:08:43 +01:00
Igor Venevtsev
d9aae805c7 Do not apply L0 debugger WA (Disable L3 cache) for highest DG2 steppings 
Related-To: NEO-6320

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2022-01-17 13:46:40 +01:00
Filip Hazubski
5be4d89b73 Rename function 
Rename MemorySynchronizationCommands::isDcFlushAllowed
to MemorySynchronizationCommands::getDcFlushEnable

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-30 17:03:22 +01:00
Maciej Plewka
615688336f Program all fields in SCM 
Related-To: NEO-6432

This change applies WA that always programs all fields in SCM for
gen12lp. Also for those platforms Force Non-Coherent is set to 0x2.

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2021-12-28 16:30:47 +01:00
Mateusz Jablonski
896e01c1cb Require exact revision when getting binary builtin for PVC 
this change also implements logic for recompilation of builtin from spv in L0
in case when binary resource is not available


Related-To: NEO-6170
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-12-22 19:56:54 +01:00
Filip Hazubski
0fd685541d Add isDcFlushAllowed function to HwInfoConfig 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-21 18:29:43 +01:00
Filip Hazubski
6d439f88bb Explicitly set dcFlushEnable value 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-21 12:21:11 +01:00
Lukasz Jobczyk
bc58172075 Revert "Enable task count update from wait" 
This reverts commit 8db36ddf28d0b85516e0adf77dbfc78000d22146.

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2021-12-20 16:53:16 +01:00
Lukasz Jobczyk
6e5bc0d5ee Enable task count update from wait 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2021-12-17 15:21:51 +01:00
Lukasz Jobczyk
1f0c58d0bf Refactor timestamp wait mechanism 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2021-12-16 13:22:19 +01:00
Igor Venevtsev
fe250d99b1 Disable L3 caches for debug on ATS and DG2 
Resolves: NEO-6320

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2021-12-14 13:59:09 +01:00
Bartosz Dunajski
d07c76c237 unTypedDataPortCacheFlush pipe_control helper support 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-12-09 13:00:10 +01:00
Bartosz Dunajski
7c610ed5bb Add new Engine Group types 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-12-07 15:28:15 +01:00
Bartosz Dunajski
2b1aa8b331 Compilation fix: Add missing LrcaHelper types 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-12-07 13:19:36 +01:00
Bartosz Dunajski
68aea5bf62 Rename compression flags and helpers 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-12-03 18:09:02 +01:00
Zbigniew Zdanowicz
3e1023fa1a Unify memory layout for all multi tile post sync operations 
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-12-02 18:00:40 +01:00
Lukasz Jobczyk
fb376639ee Refactor isDirectSubmissionSupported 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2021-11-25 13:40:41 +01:00
Lukasz Jobczyk
e8cc34d7b0 Add infrastructure to assign engine to command queue with round robin 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2021-11-15 13:13:40 +01:00
Zbigniew Zdanowicz
78609cd9f5 Optimize number of calls for pipe control post syncs 
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-11-10 18:36:21 +01:00
Zbigniew Zdanowicz
36fd163837 Refactor pipe control post sync operations 
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-11-10 08:53:03 +01:00
Compute-Runtime-Validation
908a7721b2 Revert "Assign engine to command queue using round robin algorithm" 
This reverts commit 2fff0f9059.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2021-11-10 07:25:44 +01:00
Lukasz Jobczyk
2fff0f9059 Assign engine to command queue using round robin algorithm 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2021-11-09 11:05:16 +01:00
Compute-Runtime-Validation
9058de77cc Revert "Assign engine to command queue using round robin algorithm" 
This reverts commit 1c68ac1cbc.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2021-11-08 16:36:18 +01:00
Mateusz Hoppe
ee418efadf Per-thread scratch offset calculation 
Related-To: NEO-6404

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2021-11-05 11:03:17 +01:00
Zbigniew Zdanowicz
23a7ab7593 Refactor implicit scaling barriers to add more cache flush options 
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-11-04 17:56:12 +01:00
Lukasz Jobczyk
1c68ac1cbc Assign engine to command queue using round robin algorithm 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2021-11-03 17:16:54 +01:00
Zbigniew Zdanowicz
a7747fece5 Refactor creation of buffer surface state 2/n 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-10-21 16:09:54 +02:00
Katarzyna Cencelewska
1c8a6d895a Use hwInfoConfig to check blitter support for image 
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2021-10-13 17:51:00 +02:00
Bartosz Dunajski
5856c283c5 Remove HardwareCapabilities struct 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-10-12 07:25:06 +02:00
Kamil Kopryk
cfc673b77c Add compilerHwInfoConfig 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6237
 2021-10-06 21:27:34 +02:00
Igor Venevtsev
da982b41be Add readSbaBuffer() interface 
Related-To: NEO-6277

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2021-09-30 18:02:00 +02:00
Zbigniew Zdanowicz
25c71a6c13 Move kernel info to shared directory 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-09-29 23:49:49 +02:00
Rafal Maziejuk
82f27e882d Refactor Gen12LP helpers 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-4541
 2021-09-27 14:07:37 +02:00
Rafal Maziejuk
7c473d0a11 Move setCapabilityCoherencyFlag function from HwHelper to HwInfoConfig 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-4541
 2021-09-23 11:45:34 +02:00
Rafal Maziejuk
dc8b92d8a6 Move heapInLocalMem function from HwHelper to HwInfoConfig 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-4541
 2021-09-22 11:44:44 +02:00
Krzysztof Gibala
3b4a5c25da Move isPipeControlPriorToNonPipelinedStateCommandsWARequired to hwInfoConfig 
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2021-09-21 16:03:49 +02:00
Katarzyna Cencelewska
620bb43c6b Move isNewResidencyModelSupported to hwInfoConfig 
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2021-09-20 18:54:31 +02:00
Rafal Maziejuk
09ac89339e Move local memory access mode getters from HwHelper to HwInfoConfig 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-4541
 2021-09-13 13:10:14 +02:00
Krzysztof Gibala
7c1ea18f74 Enable adding extra pipe control on specific platforms 
Related-To: NEO-6056
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2021-09-10 16:22:47 +02:00
Rafal Maziejuk
bbfbf19a02 Move allowStatelessCompression from HwHelper to HwInfoConfig 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-4541
 2021-09-09 11:37:47 +02:00
Rafal Maziejuk
6b062a62b8 Move allowRenderCompression function from HwHelper to HwInfoConfig 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-4541
 2021-09-08 11:59:29 +02:00
Kamil Kopryk
ae88789bce Move isMidThreadPreemptionSupported helper to hwHelper 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2021-09-07 20:28:55 +02:00
Rafal Maziejuk
824102dc6c Move isDisableOverdispatchAvailable function from HwHelper to HwInfoConfig 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-4541
 2021-09-07 14:12:48 +02:00
Kamil Kopryk
4f15365dae Correct getDeviceMemoryName 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6112
 2021-09-07 09:23:31 +02:00
Kamil Kopryk
a203cd2863 Add sip kernel as hexadecimal array header 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-5777
 2021-09-03 17:16:58 +02:00