Refactors the STATE_BASE_ADDRESS to align with the latest specification.
Removes redundant functionality for multiple GPU partial writes and
atomics.
Related-To: NEO-13147
Signed-off-by: Vysochyn, Illia <illia.vysochyn@intel.com>
Performs minor renaming (mostly capitalization) in order to align with
specification.
Renames L1_CACHE_POLICY to L1_CACHE_CONTROL.
Related-To: NEO-13147
Signed-off-by: Vysochyn, Illia <illia.vysochyn@intel.com>
- samplers using bindless adressing require patching bindless offsets to
sampler states on kernel's cross thread data
Related-To: NEO-10505
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
- program surface states for redescribed images correctly. Image copy
to/from memory are using redescribed surface states,
- refactor state base address programming - program address and size
together, set max size at the beginning due to lack of Enable flag
- set GpuBase in WddmAllocation when external heap is used
- return max ssh required size from kernelInfo or based on stateful args
Related-To: NEO-7063
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
- program global bindless ssba when external allocator used (
UseExternalAllocatorForSshAndDsh)
Related-To: NEO-7063
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
- This change gets level one cache policy from cached values instead
of calling virtual methods
Related-To: NEO-5055
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
This refactor simplifies internal interfaces and implementations for
different platforms. The change is introduction into adapting
state base address helper class for all functional needs of the driver.
Related-To: NEO-5055
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
Another step towards cleaner callers of
StateBaseAddressHelper<>::programStateBaseAddress.
Export programming state base address into a separate function to
improve code reuse and reduce copy-pasted fragments, which make code
modifications or maintenance more and more difficult over time. Use
specialization for gen-specific variations.
Related-To: NEO-6774
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
With compiler LSC WAs this gives better performance.
If debugger is active, policy will not be changed ie.
will be WBP.
Related-To: NEO-7003
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
With compiler LSC WAs this gives better performance.
If debugger is active, policy will not be changed ie.
will be WBP.
Related-To: NEO-7003
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
Related-To: NEO-7003
Add function to control l1 policy for both
stateless and surface state cache.
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
remove setters/getters for Index To Mocs Tables fields
all information contained in MOCS from gmm client context is now handled
by dedicated method set/get MemoryObjectControlState
Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
Related-To: NEO-6448
- add new IGC compilation flag when bindless mode used
- fix SBA programming of BindlessSurfaceStateSize -
always set maximum surface state count
- fix residency of global DSH heap on gen9 - gen12lp
in bindless mode
- add L0 aub test with bindless kernel - disabled
- partial fixes in OCL aub tests
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
