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1012 Commits

Author SHA1 Message Date
Mateusz Jablonski
b5b8762faf refactor direct submission: Pass command stream receiver to ctor 
Related-To: NEO-6643

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-04-19 23:02:55 +02:00
Lukasz Jobczyk
6fdcb83020 Add missing tbx calls to timestamp wait logic 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-04-19 14:24:06 +02:00
Kacper Nowak
1a33fc0dc7 Zebin: return error on parsing empty vector entries in zeInfo 
This commit prevents a yaml parsing error in case a data type is passed
after empty vetor type data entry with the same indendation. In this
case, a parsing error will be returned.
- Corrected .ze_info section in valid empty program (zebin mock)
- Minor ults refactor in order to use mock zebin program with valid
.ze_info

Related-To: NEO-6735
Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
 2022-04-19 13:12:47 +02:00
Bartosz Dunajski
5f37aa4ba4 Pass cache settings to aub_stream 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-04-19 11:00:07 +02:00
Krystian Chmielewski
34ebcc9520 Zebin: Use addend in relocations 
feat(zebin): Use addend from RELA sections when performing relocations.

Resolves: NEO-6898

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
 2022-04-19 09:19:26 +02:00
Lukasz Jobczyk
b15c8e971c Move isTimestampWaitSupported method to different file 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-04-15 13:20:02 +02:00
Dominik Dabek
8d1ad5a4f3 Refactor: use stack vector for root device indices 
Stack vector will not cause dynamic allocations in most circumstances
ie. number of root device indices not more than 16

Related-To: NEO-6837

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-04-14 14:05:42 +02:00
Lukasz Jobczyk
b67b1bd6fc Download tag allocation only if was submitted 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-04-13 16:30:47 +02:00
Krystian Chmielewski
7a64982822 Debug Zebin pass kernel's address 
feat: Set text sections' addresses with valid GPU VA. Offset debug symbols
with text segment names by corresponding segment's GPU VA.

Resolves: NEO-6873

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
 2022-04-13 08:38:49 +02:00
Raiyan Latif
c856899dbb Account for hwInfo when checking for implicit scaling support 
Signed-off-by: Raiyan Latif <raiyan.latif@intel.com>
 2022-04-12 18:10:38 +02:00
Krystian Chmielewski
ee0d183cf9 Handle legacy hasBarriers properly 
Previous change regarding NEO-6785 added encoding of number of barriers
to specific value representation depending on hardware that we program for.

In patch token format encoding of number of barriers is sent via
hasBarriers field in a token.
In zebin true number of barriers is sent via barrier_count field in
zeInfo.

To remove this discrepancy, translate encoded number of barriers into
true number of barriers in legacy format.

Resolves: NEO-6785

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
 2022-04-12 09:44:10 +02:00
Bartosz Dunajski
884d729e4e Improve pat index programming on linux 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-04-12 08:18:20 +02:00
Krystian Chmielewski
01a719cf33 Allow for zebin rebuild when IR is present 
This commits adds rebuilding zebin binary.
If zebin is built for different device and has SPIRV, then new ze binary
will be built using SPIRV.

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
 2022-04-12 08:05:25 +02:00
Daria Hinz
ce645f13b7 Encode PRODUCT_CONFIG value into fatbinary 
Change modifies the encoding entry in fatbinary for platforms.
If numbering in -device is used, the value PRODUCT_CONFIG will be encoded.
The functionality that returns the correct product config values has
also been added.

Related-To: NEO-6744
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
 2022-04-11 15:09:17 +02:00
Zbigniew Zdanowicz
f8b8f58bea test: add new encode tests 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-04-08 12:39:23 +02:00
Krystian Chmielewski
2c1bfbb5b2 Encode number barriers 
When programming number of barriers use BARRIER_SIZE enumeration.
Resolves: NEO-6785

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
 2022-04-08 10:32:23 +02:00
Daniel Chabrowski
4d4ccfd128 Remove cache info base class 
There is only one implementation of said class and we don't
even adhere to the interface it provides.

Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com>
 2022-04-07 18:15:57 +02:00
Bartosz Dunajski
fc4eaa1894 Refactor passing GlobalFenceAllocation to DirectSubmission 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-04-07 16:08:07 +02:00
Lukasz Jobczyk
fffcf2612e Flush tag only if needed in deferred deleter 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-04-07 15:36:29 +02:00
Bartosz Dunajski
db9c0d1103 Refactor and enable MI_MEM_FENCE programming for DirectSubmission dispatch 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-04-07 12:53:56 +02:00
Daniel Chabrowski
3c4b442c79 Virtual engines for BCS 
Signed-off-by: Daniel Chabrowski daniel.chabrowski@intel.com
Related-To: NEO-6591
 2022-04-07 11:52:29 +02:00
Zbigniew Zdanowicz
7d79c64c35 Change event memory layout for multi tile capable platforms 
Related-To: NEO-6811

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-04-07 10:44:14 +02:00
Compute-Runtime-Validation
b88e16252e Revert "Change event memory layout for multi tile capable platforms" 
This reverts commit 616dd55789.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-04-07 07:55:34 +02:00
Compute-Runtime-Validation
64d3f95410 Revert "Allow for zebin rebuild when IR is present" 
This reverts commit 2ae3f3e521.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-04-06 23:17:22 +02:00
Bartosz Dunajski
6e9c890890 Enable sfence instruction programming for DirectSubmission dispatch 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-04-06 14:24:04 +02:00
Zbigniew Zdanowicz
f4407064a4 Refactor store register mem encoder to include partition parameter 
Related-To: NEO-6811

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-04-06 14:00:56 +02:00
Zbigniew Zdanowicz
616dd55789 Change event memory layout for multi tile capable platforms 
Related-To: NEO-6811

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-04-06 11:20:57 +02:00
Mateusz Jablonski
d3b7ea10c8 Dont allocate dynamic memory when preparing params for vm bind call 
Related-To: NEO-6837
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-04-05 19:41:56 +02:00
Krystian Chmielewski
2ae3f3e521 Allow for zebin rebuild when IR is present 
Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
 2022-04-05 10:25:06 +02:00
Filip Hazubski
d2462ff8fb Add debug flag to control ISA allocation padding 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-04-04 15:12:30 +02:00
Mateusz Hoppe
8e98b586ed Cleanup shared test files - xe_hpc_core 
- move test files from shared/test/common directory to
shared/test/unit_test
- cleanup cmakelists.txt files

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2022-04-04 14:18:40 +02:00
Mateusz Jablonski
817ba40771 Stop accessing task count from out-of-bound in opencl and shared ult 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-04-04 11:29:54 +02:00
Mateusz Jablonski
b45ffdb334 Move drm command stream fixture to shared 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-04-01 15:58:37 +02:00
Bartosz Dunajski
779bca39a7 Debug flag to add sfence instruction prior to DirectSubmission dispatch 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-04-01 15:53:03 +02:00
Mateusz Jablonski
7910567a76 Handle missing tag address in getting completion address 
rename test fixture to comply one definition rule

Related-To: NEO-6643
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-04-01 15:00:35 +02:00
Mateusz Jablonski
9d502dea25 Refactor waitOnCompletionFence method in DrmMemoryManager 
get completion address and value from command stream receiver

Related-To: NEO-6643

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-03-31 19:30:16 +02:00
Dominik Dabek
308f9ccfff Do not allocate dynamic state heap if not needed 
Dynamic state heap is only used for sampler data.

Related-To: NEO-6821

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-03-31 12:13:13 +02:00
Kacper Nowak
afd71beee9 Add slm_alignment entry to .zeInfo payload_arguments section 
This commit adds suport for parsing "slm_alignment" entry in .ze_info
section.
- Set requiredSlmAlignment for addresing mode slm
- Enable optional passed slm alignment parsing (with default value=16
left).

Related-To: NEO-6817
Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
 2022-03-31 12:00:16 +02:00
Jobczyk, Lukasz
a285712cc4 Add missing download allocation calls 
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-03-31 09:49:22 +02:00
Sebastian Luzynski
01e76998d4 Remove unused CPU features 
Signed-off-by: Sebastian Luzynski <sebastian.jozef.luzynski@intel.com>
 2022-03-30 18:20:08 +02:00
Daniel Chabrowski
5350553f72 Use PrelimHelper for isDebugAttachAvailable 
Signed-off-by: Daniel Chabrowski daniel.chabrowski@intel.com
Related-To: NEO-6591
 2022-03-30 16:17:05 +02:00
Compute-Runtime-Validation
91cfd3cd1a Revert "Unify command/ring/semaphore buffers placement" 
This reverts commit e035199de4.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-03-30 14:05:47 +02:00
Krystian Chmielewski
6023a5b58e Zebin: don't fail when extfunc caller cannot be found 
This commit removes early fail in linking with zebin and external
functions which happens when, there's a relocation to external functions
section, but it's not modifying any external function. And only treats
GLOBAL FUNC symbols pointing to external functions section as external
function symbols.

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
 2022-03-30 13:53:25 +02:00
Milczarek, Slawomir
7cd4ca5ce7 Fixed AUB capture in HW mode for umd-migrated shared allocations 
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2022-03-30 12:04:58 +02:00
Naklicki, Mateusz
bce96e666f Use updated macro names 
Related-To: NEO-6730

Signed-off-by: Naklicki, Mateusz <mateusz.naklicki@intel.com>
 2022-03-30 10:44:59 +02:00
Sebastian Luzynski
cf906030ac Add neon intrinsics for aarch64 
Related-To: NEO-6452

Signed-off-by: Sebastian Luzynski <sebastian.jozef.luzynski@intel.com>
 2022-03-29 18:22:32 +02:00
Mateusz Jablonski
e035199de4 Unify command/ring/semaphore buffers placement 
put them all to the same memory location

Related-To: NEO-6698
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-03-29 17:55:48 +02:00
Mateusz Hoppe
681c09d314 Extend LinearStream with gpuBase 
- added methods to set and query gpu base address

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2022-03-29 15:15:53 +02:00
Dominik Dabek
fccda460d6 Optimize zeCommandListCreate 
Do not allocate heap if command list is copy only.

Related-To: NEO-6821

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>

Co-authored-by: Michal Mrozek <michal.mrozek@intel.com>
 2022-03-28 16:31:10 +02:00
Jobczyk, Lukasz
d77a6cbe4b Enable task count update from wait 
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2022-03-28 11:09:55 +02:00