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102 Commits

Author SHA1 Message Date
Dominik Dabek
819ffea90f fix: reenable indirect detection for non-VC, PVC 
Issue is limited to detection in VC, can reenable for other kernels.

Related-To: NEO-13372

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-12-04 14:59:02 +01:00
Dominik Dabek
5167f34a8a fix: disable indirect detection, PVC 
Related-To: NEO-13372, GSD-10403

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-12-03 13:53:47 +01:00
Filip Hazubski
8797c326b6 refactor: Move isDummyBlitWaRequired function to release helper 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2024-11-15 13:22:00 +01:00
Compute-Runtime-Validation
45a26c22dd Revert "performance: limit tlb flush scope to DG2" 
This reverts commit 10d123ae3e.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-10-30 22:38:17 +01:00
Szymon Morek
10d123ae3e performance: limit tlb flush scope to DG2 
Related-To: NEO-7116

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2024-10-30 18:27:19 +01:00
Zbigniew Zdanowicz
d6016e1b91 refactor: unify programming of preferred slm size 3/n 
- add shared implementation to encode preferred slm size
- add pvc release helper preferred slm array
- drop pvc preproduction steppings values for preferred slm size
- remove obsolete product helper method

Related-To: NEO-12639

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2024-10-07 12:10:27 +02:00
Dominik Dabek
571d703135 refactor: indirect detection helpers 
Check indirect detection version from igc header for JIT.
Move required version to its own method.

This allows for different required versions per platform.

Related-To: NEO-12491

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-09-11 14:49:54 +02:00
Compute-Runtime-Validation
a8be06b92e Revert "performance: enable indirect detection, xe hpg" 
This reverts commit a7c4256e65.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-09-05 03:35:23 +02:00
Dominik Dabek
a7c4256e65 performance: enable indirect detection, xe hpg 
Enable for xe hpg and lpg.

Related-To: NEO-12491

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-09-04 16:57:54 +02:00
Katarzyna Cencelewska
12d1bce6b9 fix: change gmm resource for externalHostPtr 
Resolves: NEO-10157

Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2024-05-22 16:50:17 +02:00
Compute-Runtime-Validation
94a4bbac57 Revert "fix: change gmm resource for externalHostPtr" 
This reverts commit 63843862df.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-05-21 07:43:53 +02:00
Katarzyna Cencelewska
63843862df fix: change gmm resource for externalHostPtr 
Resolves: NEO-10157

Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2024-05-21 00:43:29 +02:00
Dominik Dabek
fd47030ad6 fix: use igc indirect detection v3 
Update to use igc indirect detection v3. Fix for not detecting indirects
passed as implicit arguments.

Related-To: NEO-11396

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-05-15 06:35:42 +02:00
Maciej Plewka
b722f3b579 feature: Add interface to bind resources as readonly 
Related-To: NEO-10398
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2024-03-27 14:24:58 +01:00
Compute-Runtime-Validation
8e44a46983 Revert "feature: bind resources as read only" 
This reverts commit f3d36d3350.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-03-27 08:51:47 +01:00
Maciej Plewka
f3d36d3350 feature: bind resources as read only 
Related-to: NEO-10398
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2024-03-26 14:11:57 +01:00
Zbigniew Zdanowicz
9815f1e99b refactor: group template implementations and change inl file names 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2024-03-14 08:38:05 +01:00
Filip Hazubski
a184856921 fix: Remove inline specifier from device id vectors definition 
Resolves: HSD-18037239819

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2024-03-11 09:52:27 +01:00
Mateusz Jablonski
a8fbed6120 feature: enable dummy blit WA for PVC 
Related-To: NEO-9996
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-03-01 14:04:46 +01:00
Mateusz Jablonski
3e65e7bdba fix: correct number of max work group count for concurrent kernel on PVC 
for single-CCS mode use all EUs

Related-To: NEO-8377
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-02-26 10:42:50 +01:00
Compute-Runtime-Validation
0b64240deb Revert "feature: enable dummy blit WA for PVC" 
This reverts commit fb9d225495.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-02-08 04:27:00 +01:00
Dominik Dabek
b4a2e243dc performance: accept AOT kernels for indirects 
Use indirects detection mechanism for AOT kernels if the detection
version is at least 2.

Related-To: NEO-7712

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-02-06 15:59:42 +01:00
Mateusz Jablonski
fb9d225495 feature: enable dummy blit WA for PVC 
cleanup redundant implementation for DG2

Related-To: NEO-9996
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-02-06 10:17:12 +01:00
Dominik Dabek
b3b402cad2 feature(zebin): read indirect detection version 
Read indirect detection version intel compat notes from zebin.

This is to prepare for enabling indirect access optimization in AOT
built kernels.

Related-To: NEO-7712

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-01-12 14:20:52 +01:00
Dunajski, Bartosz
87857a6558 feature: add new PVC device id 
Related-To: NEO-9736

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-12-29 19:06:33 +01:00
Compute-Runtime-Validation
341a13ce8e Revert "performance: Limit tlb flush WA scope on DG2 Linux" 
This reverts commit fa181937a4.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2023-12-24 08:17:39 +01:00
Lukasz Jobczyk
fa181937a4 performance: Limit tlb flush WA scope on DG2 Linux 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2023-12-21 12:18:29 +01:00
Compute-Runtime-Validation
590418a588 Revert "performance: Limit tlb flush WA scope on DG2 Linux" 
This reverts commit 0b85a9f256.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2023-12-21 08:52:58 +01:00
Lukasz Jobczyk
0b85a9f256 performance: Limit tlb flush WA scope on DG2 Linux 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2023-12-20 16:53:54 +01:00
Mateusz Jablonski
de93bc6928 refactor: correct naming of enum class constants 10/n 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-12-19 11:30:39 +01:00
Mateusz Jablonski
dd1b9d6abc refactor: correct naming of enum class constants 8/n 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-12-19 08:18:18 +01:00
Mateusz Jablonski
c9664e6bad refactor: rename global debug manager to debugManager 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-11-30 13:00:59 +01:00
Filip Hazubski
fee423fa15 fix: Add PVC device id 0x0B6E for Intel(R) Data Center GPU Max 1100C 
Resolves: NEO-9440

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2023-11-14 08:03:51 +01:00
Mateusz Jablonski
6eeb9322b9 refactor: remove not needed method 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-10-06 15:22:40 +02:00
Mateusz Jablonski
b1808f7830 fix: correct suggested number of work groups for concurrent kernels on PVC 
value depends on CCS count:
- single CCS mode (default) - 50% available
- two CCS mode - 25% available
- four CCS mode - 12.5% available

Related-To: NEO-8377
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-09-20 13:40:22 +02:00
Compute-Runtime-Validation
73731d3be5 Revert "fix: correct suggested number of work groups for concurrent kernels o... 
This reverts commit 6fc673b0fe.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2023-09-15 04:21:58 +02:00
Mateusz Jablonski
6fc673b0fe fix: correct suggested number of work groups for concurrent kernels on PVC 
value depends on CCS count:
- single CCS mode (default) - no limitations
- two CCS mode - 25% available
- four CCS mode - 12.5% available

Related-To: NEO-8377
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-09-14 16:13:54 +02:00
Dominik Dabek
5c5c718af3 performance: detect indirect access in kernel, PVC 
Enabling on pvc after patch in igc.

Enabling only for JIT kernels because AOT could have been compiled with
IGC older than required.

Related-To: NEO-7712

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-08-24 02:15:11 +02:00
Dominik Dabek
8976d8b033 fix: disable checking indirects in kernel 
Related-To: NEO-7712

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-06-20 10:50:16 +02:00
Kamil Kopryk
6a0f7afd64 feature: verify stateful information only when binary is generated by IGC 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>

Related-To: NEO-6075

Ngen binaries contain stateful information, however they are
not used in isa on Pvc. Therefore, we can just ignore them.
 2023-06-12 11:45:41 +02:00
Mateusz Jablonski
c544004b8e fix: move getProductConfigFromHwInfo to CompilerProductHelper 
add tests for default PVC configs

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-05-29 14:08:52 +02:00
Dominik Dabek
1ec5ae277c feature: enable checking indirect access on pvc 
Enable for zebin format but not CM kernels.
Use heuristic of simdSize == 1 to detect CM kernels.

Related-To: NEO-7712

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-05-10 11:38:00 +02:00
Aravind Gopalakrishnan
1883161e1e fix: Add debug key to Force Tlb flush 
Related-To: GSD-4457

Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
 2023-05-01 17:52:22 +02:00
Daria Hinz
c3f4074f0a fix: Unification of aot config with hw ip version 
In the case of mtl+ platforms, the returned config value
should equal the hardware ip version value.
This change fixes situations where some config has not been
added and in this case we returned an unknown value.

Signed-off-by: Daria Hinz <daria.hinz@intel.com>
Related-To: NEO-7738
 2023-04-12 18:34:03 +02:00
Compute-Runtime-Validation
9608879372 Revert "feature: pvc, cpu copy in program init" 
This reverts commit 77d70fd4a7.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2023-03-31 13:56:39 +02:00
Dominik Dabek
77d70fd4a7 feature: pvc, cpu copy in program init 
Use cpu copy for globals surface when allocated through svm, allocation
not set as lockable but locking allocation succeeds.
Make sure gfx allocations is unlocked after copy.

Related-To: NEO-7796

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-03-30 18:05:24 +02:00
Rafal Maziejuk
c8e900a97f Delete 0x0BD1, 0x0BD2 and add 0x0B69 PVC config 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-7741
 2023-03-30 09:56:25 +02:00
Compute-Runtime-Validation
6bb48ff809 Revert "feature: pvc, cpu copy in program init" 
This reverts commit 4c891e80a5.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2023-03-30 07:51:25 +02:00
Dominik Dabek
4c891e80a5 feature: pvc, cpu copy in program init 
Use cpu copy for globals surface when allocated through svm, allocation
not set as lockable but locking allocation succeeds.

Related-To: NEO-7796

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-03-28 23:23:40 +02:00
Maciej Plewka
829c93ca68 Limit space in tile for concurrent kernels on pvc 
Related-To: NEO-7658, HSD-16016919338

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2023-02-23 09:50:47 +01:00