Modified BlitCommandsHelper and CommandListHw to patch counter values
when using additional blit properties and in order command list is
enabled.
Related-To: NEO-13003
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
Refactored various member variables in EncodeDispatchKernel to directly
include EncodePostSync
Changed command encoder and command list to use the modified
EncodeDispatchKernel.
Related-To: NEO-13003
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
Refactored various member variables in EncodeDispatchKernel to directly
include EncodePostSync
Changed command encoder and command list to use the modified
EncodeDispatchKernel.
Related-To: NEO-13003
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
This change caches the most used MOCS values:
* getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CONST);
* getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER);
* getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED);
inside gmmHelper class during initialization to avoid repeated
calls of virtual functions, branches and/or gmm lib access.
and adds more readably corresponding getters:
* getL1EnabledMOCS
* getL3EnabledMOCS
* getUncachedMOCS
If force all resources uncached is called,
these 3 cached mocs values are reinitialized
It also changes the order of gmmHelper members, to avoid
not needed padding after addressWidth
and simplifies logic in getMocsIndex function
for xehp and later products.
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Created EncodePostSync template struct to organize various post-sync
variables/functions from EncodeDispatchKernel
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
- move various methods from specialization in cpp into correct inl files
- EncodeAtomic, EncodeMiFlushDW, EncodeMemoryPrefetch, EncodeDispatchKernel
- move methods from generic inl files that are used on single platform to cpp
- EncodeMiFlushDW
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
- share xe hpc methods in generic way
- move gen12lp and xe hpg methods into dedicated inl
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
- shift xe hpg inl file methods into specialization and generic inl files
- remove gen12lp specific implementation from main inl file
- remove not needed xe hpg inl file
- remove not needed compression inl files
- remove not used raytracing inl file
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
- remove obsolete file
- move methods from redundant compute mode file into dedicated platform files
- group same implementation into platform specific inl files
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
This change prepares infrastructure for pipeline select handling in
command lists and queues by optimization of number of commands dispatched.
State is synchronized between flush-task immediate and regular command lists.
Next step is to add optimization itself which disables legacy hw command
dispatch algorithm.
This change corrects ADL-P support for systolic mode changes.
Related-To: NEO-5019
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6075
Binding table entry count was zeroed even when
ForceBtpPrefetchMode debug flag was enabled
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-7156
Additional pipeline select is required only on specific
gen12lp products. That check was missing only in cmdstream size
estimation path, hence we had an overestimation.
Command lists and their helper classes should use engine group type
assigned to the particular command list to check if it is RCS group
and not use default CSR class assigned to the device, since default
and current in command list might be different.
Related-To: NEO-5019
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
