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1a4628cd8e555b7ba4e4bcdccc37eacdf91dc20e
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979 Commits

Author SHA1 Message Date
Milczarek, Slawomir
1a4628cd8e AUB file with information about driver version 
Change-Id: I7f8e01236962580515f36d72805d33af40d5fd2d
 2018-11-14 19:46:45 +01:00
Mrozek, Michal
3c0a6bd24d Remove residency control from Buffer Object. 
- Residency is being controlled by Graphics Allocation.
- Duplicates are now eliminated only for shared resources.

Change-Id: Ib51e2739a07728ae0b94abf6cce2e9981b017111
 2018-11-14 08:32:04 +01:00
Hoppe, Mateusz
0942edd6af Update aub_stream headers 
- pass hwInfo and localMemoryEnabled to AubCenter ctor
- initialize AubCenter in Platform:intialize() when Device is
 created - only when CSR is not CsrHw
- move aub_center files to runtime/aub directory

Change-Id: Iceb4bf1cb2bb55b42d438502cca667a449f11411
 2018-11-13 18:09:30 +01:00
Hoppe, Mateusz
12ece3a220 Reorder STATE_BASE_ADDRESS and STATE_SIP 
- STATE_SIP should be added after STATE_BASE_ADDRESS
- tests refactor.

Change-Id: I000316b70db714fb227b6174f793d4bf8806ea9a
 2018-11-13 17:57:51 +01:00
Dunajski, Bartosz
e0f782e77a Improve TimestampPacketWriteEnabled condition check 
Change-Id: I2117dbd7841e65ed87241c0b08fafe058019b690
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-13 13:40:33 +01:00
Milczarek, Slawomir
aa18a62d70 A partial unification of AUB and TBX CSR classes 
This commit moves initialization of global MMIOs from AUB CSR to Simulated CSR

Change-Id: I93a612d4f0c82e7135287f6508870190790141bc
 2018-11-10 13:12:22 -08:00
Dunajski, Bartosz
1e0064fc2f Allow ULTs to work with enabled TimestampPacketWrite 
Change-Id: Idd4622469220b859e8724d9179837c685377ce52
 2018-11-07 08:50:04 +01:00
Maciej Dziuban
b0acc5ecde Move isMemoryBudgetExhausted to WddmResidencyController 
Change-Id: Ic9da29ab954835e93cfbcd6690c1764d99939613
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-11-06 23:09:20 +01:00
Mateusz Jablonski
630a7e1c26 Allow to reuse just completed allocation 
Change-Id: I7c1ab153178b79348d49209ca09478543d35e197
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-06 22:11:24 +01:00
Woloszyn, Wojciech
549b73510c Flush L3 for reduced address space platforms 
Change-Id: I5a73e72f8e309137328930920ab174ba6f1378dc
 2018-11-06 14:26:59 +01:00
Mateusz Jablonski
815ae851b7 Graphics Allocation: store task count per context id 
Move definition of allocations list method to internal_allocation_storage.cpp

Change-Id: I4c6038df8fd1b9335e8a74edbab33b78f9293d8f
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-06 12:43:47 +01:00
Filip Hazubski
ea2e634f7e Add clCreateBufferWithPropertiesIntel() API 
Change-Id: Icfbbbc2479c1bc94008e0ccf90bcb25adddf0b61
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2018-11-06 11:03:04 +01:00
Maciej Dziuban
42b2ed6a90 Register trimCallback with WddmResidencyController as Context 
Change-Id: Ibc34aac17e79df3a3096c29c34506039e2c5bdcc
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-11-05 17:43:20 +01:00
Mrozek, Michal
5336e87590 Remove limit to 256 work items for local workgroup size. 
Change-Id: I30accf0dbf8086a10fb96d29924a7a2c4ef15eb0
 2018-11-05 17:17:59 +01:00
Maciej Dziuban
ef02827cd9 Add tests for locking in trimResidency() 
Change-Id: Iddbecedae9cf21a4e5232dcac5d145962623e7d6
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-11-05 15:58:06 +01:00
Woloszyn, Wojciech
df4c6c7507 Add VME support to device caps 
Change-Id: I5af819c24f2361b81ee614b2007bde7fa2a84713
 2018-11-04 21:55:17 +01:00
Zdanowicz, Zbigniew
ce75767ca3 Add AUB registry key to override MMIO offset value 
Change-Id: Iac3bf9074e544a03e38fc437d7b21ea478d9cc5d
 2018-11-03 00:33:50 +01:00
Milczarek, Slawomir
08676826c6 Init MI_SEMAPHORE_WAIT with memory polling mode 
Change-Id: Id7e4ca279568bf3366ab958ab3bb9af8454f5045
 2018-11-02 10:31:23 -07:00
Hoppe, Mateusz
e6b93941ee Add aub_stream headers 
Change-Id: I4d9420210e2a06d8a36abc0cf272901514ff3547
 2018-11-02 14:29:45 +01:00
Stefanowski, Adam
c202c95634 Stop creating osInterface in WddmCSR and DrmCSR constructors 
Change-Id: Ic8ca21824882dfae5df3fe05c7ec1ff96311f286
 2018-10-31 15:01:50 +01:00
Mrozek, Michal
8bec1906ec Remove alignedCpuPtr from WddmAllocation 
- also switch to make_unique in wddm memory manager functions.

Change-Id: I2f7cf412a993040439466f1971d935fb8429ce7c
 2018-10-31 14:07:39 +01:00
Kowalczuk, Jakub
1822fb0747 Control enabling of local memory based on OS and HW Capabilities part 2 
- add EnableLocalMemory debug variable
- separate OSInterface::osEnableLocalMemory for dll and unit tests

Change-Id: I78a1f60364eece28b30ce3e91418e7d72ba3e0d9
 2018-10-31 13:59:42 +01:00
Mateusz Jablonski
8dc28f2445 Remove not needed locks in internal allocation storage 
Change-Id: Ia8a084b5cb128c7888445efde6d33f43f3af2809
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-31 13:17:11 +01:00
Mrozek, Michal
200228b506 Replace cpuPtrAllocated flag with driverAllocatedCpuPointer. 
Change-Id: Ic0ce165d0e583701e1128595a3d9dabd0a61a84b
 2018-10-31 12:37:20 +01:00
Mrozek, Michal
7ece16ee7a Graphics Allocation cleanup. 
- remove one constructor
- start using mock graphics allocation in tests

Change-Id: Idb8f4a35dbc2cae8d6bf667bab5542d8e91d6e0d
 2018-10-31 11:54:24 +01:00
Maciej Godek
f9ba697587 Sharing queries for DX10/DX11 
Change-Id: Ia4f176a38bb2dbfe215efe17b13a533ee83510d3
 2018-10-31 11:52:46 +01:00
Maciej Dziuban
9c696f1d29 Create STL-friendly SpinLock implementation 
Change-Id: Ic04d34d2962ad6953fe3282a10f6cba16c0e07b3
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-10-31 08:38:32 +01:00
Mrozek, Michal
5b2e16651f Remove alignedSize from WddmAllocation. 
Change-Id: I3b610515e4d5db16ce6a604e7e2f4b85b657bef2
 2018-10-31 08:30:50 +01:00
Milczarek, Slawomir
4a8f4aa47b Add hash function for AUB dump handle 
Change-Id: I3f53f187a31ca47e7cf2717f328c216469171f90
 2018-10-30 19:54:36 -07:00
Milczarek, Slawomir
b051528258 Add getter for handle to AUB dump allocations 
Change-Id: I30251145775e9d81e307c983236bd2cc0568a74d
 2018-10-30 12:06:17 -07:00
Mateusz Jablonski
ead2e2ea6d Move createAllocationForHostPtr method to command stream receiver 
Remove not needed includes from command_queue.h

Change-Id: I45963bf005471bd7716d55471474299a15e27b62
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-30 17:49:08 +01:00
Mrozek, Michal
1dc3a94ac8 Remove not needed code. 
Change-Id: I5b0fd2960ed7777bc7603013071a431af6d435c5
 2018-10-30 15:40:08 +01:00
Mateusz Jablonski
d3f71cfb04 Move allocation lists to internal allocation storage 
Change-Id: I543f1551c8fb161cf99c5870de44afec390415b2
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-30 13:49:31 +01:00
Maciej Dziuban
dc4de3c31b Move trimResidency functions to WddmResidencyController 
Change-Id: I046fd34d5336b767ed38eda31e58e4a35ceee5f8
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-10-29 12:19:50 +01:00
Mateusz Jablonski
a30c70d84b Remove cleaning allocation lists methods from memory manager 
Change-Id: I4a58a5373e7dc4cf8dc5d90390e84c4f23689139
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-29 10:35:03 +01:00
Milczarek, Slawomir
7b1d19eaec Moved header with engine node definitions 
Change-Id: Iaa78bb0584589e354b1bb469b729844121decb8f
 2018-10-27 14:51:02 -07:00
Zdanowicz, Zbigniew
7a4ecd1507 Add new simple kernel and method to adjust WALKER command parameters 
Change-Id: Id0591908353ca744c44c7bab4e27db8332289a68
 2018-10-26 15:02:28 -07:00
Artur Harasimiuk
6aa9b36a7b DebugVariables cleanup 
- small cleanup
- files renaming to match convention

Change-Id: Iff9ed3a509001bcf6f154fc35f6d241ee9a968ae
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-10-26 17:55:25 +02:00
Filip Hazubski
7ab7d762dc Fix CmdParse 
Wrong class was used as a template parameter, causing compile errors
when building a specific driver version

Change-Id: I613ab785c06d9b5c2e58ade01b5567045ac1fcca
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2018-10-26 14:15:20 +02:00
Mateusz Jablonski
baa9ce74a7 Remove obtainReusableAllocation method from memory manager 
Change-Id: I629044d109822f02cfddc6418f025010e62ab65b
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-26 09:06:20 +00:00
Mateusz Jablonski
d5c9816428 Remove store allocation methods from memory manager 
Move setGPUAddress method to WddmAllocation

Change-Id: I91d877c3791e9eff69276e4258e3ce9c3111ca45
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-26 10:53:43 +02:00
Mrozek, Michal
40d9f97e7a Use memory constants instead of hard coded values. 
Change-Id: I4be62ec34cb7b7bcdeebb4ff82abe0c17f59af85
 2018-10-26 09:05:24 +02:00
Mateusz Jablonski
129380c1a6 Cleanup host ptr manager 
Change-Id: I0fc9df41a08255eef8072666c1c5c16806e0f7cf
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-26 08:26:38 +02:00
Hoppe, Mateusz
bf10858f59 Fix SchedulerGWS debug print 
- GWS size was not printed

Change-Id: I80347e91cc53f8cb220172e69e1a67404894149f
 2018-10-25 23:26:12 +02:00
Filip Hazubski
f5b55c5c7e Remove code duplication from cmd_parse_genX files 
Change-Id: I64bb9d8be018ea4da6cb006439c58b1d52100e06
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2018-10-25 18:00:27 +02:00
Mrozek, Michal
56d10d7fb9 Enhance AUB comments. 
Change-Id: I1ff53c9f60950cfe34706153578e86f8d36fc941
 2018-10-25 17:58:44 +02:00
Maciej Dziuban
bd431edb46 Return trimCallbackHandle from register method instead of storing in Wddm 
Change-Id: Iddfb6a926311480e355d52e5bf3e6379ec96f7a9
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-10-25 17:17:52 +02:00
Maciej Dziuban
4aae1a817b Pass Wddm to WddmResidencyController 
Change-Id: I2379ffdfb740a869f6d157ed22f40ce509d6bebe
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-10-25 17:16:41 +02:00
Kowalczuk, Jakub
8ead8f727f Control enabling of local memory based on OS and HW Capabilities 
Change-Id: Ia26c856aeef27fe638b7a6e895cc289859f3c579
 2018-10-25 16:36:47 +02:00
Mrozek, Michal
7319023b0f Add capability to use malloc for Heap32 base. 
- shift page tables to lower bits

Change-Id: I54dcba72255215cf5be75ba425fc27727b0bfd98
 2018-10-25 16:20:00 +02:00