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1cffe921ba8bc0688125a5de5da6d04d1bce7a62
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116 Commits

Author SHA1 Message Date
Daniel Chabrowski
1cffe921ba Move hw_info_config tests to shared 
Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com>
 2022-06-01 18:34:18 +02:00
Krzysztof Gibala
e146a8e8ca Correct wrong constructor pattern in GraphicsAllocation 
Related-To: NEO-6523
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2022-06-01 18:06:56 +02:00
Daniel Chabrowski
6fd7ae7142 Cleanup headers 
Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com>
 2022-05-26 17:55:44 +02:00
Filip Hazubski
36a07a77a1 Program Source/Destination CompressionType field in XY_BLOCK_COPY_BLT 
Properly handle blitter commands for media compressed images.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-05-23 12:16:19 +02:00
Artur Harasimiuk
dc78375d46 use test_files from source location in ults 
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2022-05-20 14:20:13 +02:00
Daniel Chabrowski
7463e1970b Cleanup headers 
Make TUs and headers self-contained, remove unused headers

Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com>
 2022-05-18 11:42:06 +02:00
Artur Harasimiuk
819e0f5515 style: configure readability-identifier-naming.LocalVariableCase 
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2022-05-16 12:39:44 +02:00
Kamil Kopryk
fb4b1cca4f Use internal blitter for internal memory transfers 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6621
 2022-05-11 19:33:00 +02:00
Artur Harasimiuk
e9be9b64c6 clang-tidy configuration cleanup 
Define single .clang-tidy configuration with all used checks and use
NOLINT to selectively silence tool. That way cleanup should be easier.
third_part/ has its own configuration that disables clang-tidy for this
folder.

Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2022-05-11 14:02:04 +02:00
Katarzyna Cencelewska
28317e7062 Correct test and struct names 
correct names - use xehpc instead of pvc for core tests
transform explicit xehpc tests to pvc if skip exist

Related-To: NEO-6738
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-05-05 11:35:28 +02:00
Mateusz Jablonski
ac01f74924 style: fix gcc12 compilation errors 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-04-28 18:07:15 +02:00
Zbigniew Zdanowicz
819d648997 Use single event for multiple kernels 
Related-To: NEO-6871

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-04-28 15:10:04 +02:00
Krzysztof Gibala
9b778863b4 Store GmmHelper in Gmm class 
Store GmmHelper in Gmm class instead of GmmClientContext

Related-To: NEO-6523
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2022-04-27 15:45:49 +02:00
Filip Hazubski
3900c9d24a Report to StreamProperties whether large grf should be programmed with SCM 
Add helper method to UnitTestHelper to query programmed grf values.

Related-To: NEO-6659

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-04-27 13:20:14 +02:00
Filip Hazubski
944319b3d9 Correct media compression format for blitter operations on planar images 
Set most significant bit for chroma planes.
Move common logic to helper function.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-04-22 17:02:16 +02:00
Rafal Maziejuk
a970622cc1 Print slice index in printImageBlitBlockCopyCommand function 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2022-04-19 12:04:50 +02:00
Rafal Maziejuk
c7d8915dd4 Add debug variable to print XY_BLOCK_COPY_BLT command details 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2022-03-29 18:15:13 +02:00
Filip Hazubski
586e8510de Remove unneeded include 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-03-26 09:55:25 +01:00
Kacper Nowak
5477cb6b8c Correct typo 
- Replace "aligMent" with correct "aligNMent"
Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
 2022-03-24 17:46:49 +01:00
Rafal Maziejuk
6ee5c0f677 Add appendBaseAddressOffset function to BlitCommandsHelper 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2022-03-18 16:46:15 +01:00
Kamil Kopryk
8c4b2aafa1 Move test_hw_info_config.cpp to shared unit tests 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6631
 2022-03-15 12:36:53 +01:00
Daria Hinz
452050ae40 Refactoring the use of PVC device ids 
Replacing the old device id implementation
& clearing PVC XT temporary.

Related-To: NEO-6742
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
 2022-03-14 15:54:52 +01:00
Kamil Kopryk
7d6bee26c7 Move pvc helpers to pvc files 
Related-To: NEO-6631
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-03-11 13:46:59 +01:00
Filip Hazubski
80b520bc9b Change ThreadArbitrationPolicy enum type to int32_t 
Change ThreadArbitrationPolicy::NotPresent value to -1
Update initial values to ThreadArbitrationPolicy::NotPresent

Related-To: NEO-6728

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-03-07 20:04:24 +01:00
Rafal Maziejuk
6658768149 Add check in XY_BLOCK_COPY_BLT surface width, height & depth setters 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2022-03-03 16:35:51 +01:00
Igor Venevtsev
2263fe59ec Generate revision-specific kernels for L0 
Resolves: NEO-6504

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2022-03-03 13:37:41 +01:00
Mateusz Jablonski
82e3b10c5a Fix typo 
Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-02-25 18:10:41 +01:00
Mateusz Jablonski
a2386ad216 Correct programming of implicit args on pre-XeHp platforms 
On pre-XeHp platforms implicit args aren't at the beginning of indirect data,
GPU address of implicit args buffer is programmed within cross thread data

Related-To: NEO-5081, IGC-4710
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-02-24 20:52:04 +01:00
Bartosz Dunajski
4b0d986876 Move AllocationType enum out of GraphicsAllocation class 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-02-04 17:49:09 +01:00
Kamil Kopryk
4d953fd125 Correct timestamps offset calculation 
Related-To: NEO-6653
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-02-03 12:18:20 +01:00
Baj, Tomasz
7daee00df4 Add alarmTime to ULTs 
Signed-off-by: Baj, Tomasz <tomasz.baj@intel.com>
Related-To: NEO-6413
 2022-01-31 13:51:57 +01:00
Rafal Maziejuk
fc25495ecb Add missing BlitCommandsHelper ULTs 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2022-01-28 14:49:04 +01:00
Kamil Kopryk
40483acd17 Improve blitter programming 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-01-18 10:36:05 +01:00
Mateusz Jablonski
e5a18177c5 Add unit test helper function to set pipe control hdc flush 
Separate unit test helper definitions bdw_and_later / xe_hp_and_later

Related-To: NEO-6466

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-17 15:45:29 +01:00
Rafal Maziejuk
201c3347ff Rename dispatchBlitCommandsRegion to dispatchBlitCommandsForImageRegion 
As this function no longer applies to buffers it needed to be renamed.

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2022-01-13 15:42:12 +01:00
Rafal Maziejuk
8729521769 Use dispatchBlitCommandsForBufferRegion when copying buffers in L0 
First step to separate dispatch blit commands for buffers
from dispatch blit commands for images.

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-6134
 2022-01-11 13:52:56 +01:00
Zbigniew Zdanowicz
2047fc88f9 Move execution environment helper to shared 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-12-31 11:36:44 +01:00
Maciej Plewka
615688336f Program all fields in SCM 
Related-To: NEO-6432

This change applies WA that always programs all fields in SCM for
gen12lp. Also for those platforms Force Non-Coherent is set to 0x2.

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2021-12-28 16:30:47 +01:00
Filip Hazubski
9a450d1b74 Pass hwInfo to appendMiFlushDw 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-22 15:22:47 +01:00
Fabian Zwolinski
617f65c285 Add wrapper for snprintf 
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
 2021-12-17 13:07:49 +01:00
Lukasz Jobczyk
1f0c58d0bf Refactor timestamp wait mechanism 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2021-12-16 13:22:19 +01:00
Mateusz Jablonski
3e862d1fbc Add test matcher for at least Skylake platform 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-12-15 19:52:00 +01:00
Mateusz Jablonski
527806b3ed Use full path to include test.h 2/n 
fix files in shared

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-12-15 13:09:50 +01:00
Bartosz Dunajski
4dde9393ad Extend engine checkers to support more engine types 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-12-09 13:41:25 +01:00
Bartosz Dunajski
27f20b302b Add PVC shared unit tests 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-12-07 17:32:54 +01:00
Milczarek, Slawomir
f29e4acd7e Add regkey to control cache policy for scratch space 
Introduce the regkey OverrideL1CacheControlInSurfaceStateForScratchSpace
to control cache policy in surface state for scratch space

Related-To: NEO-3227

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2021-12-06 19:51:38 +01:00
Lukasz Jobczyk
09d2ffb9ed Add missing cache flush 
Resolves: NEO-6505

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2021-12-06 17:28:12 +01:00
Jitendra Sharma
8b51358054 In level zero create single tag allocation for csr 
Multi tag allocation is useful only in openCL to ensure cross root
device synchronization based on tag address.
It is not required in level zero.
Futher multi tag allocation is causing instability in sysman
device reset. So, for level zero instead of multi tag allocation
create single tag allocation.

Related-To: LOCI-2651

Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
 2021-12-06 15:16:34 +01:00
Mateusz Hoppe
8b233f7f45 Support for bindless mode in L0 - improvements 
Related-To: NEO-6448

- add new IGC compilation flag when bindless mode used
- fix SBA programming of BindlessSurfaceStateSize -
always set maximum surface state count
- fix residency of global DSH heap on gen9 - gen12lp
in bindless mode
- add L0 aub test with bindless kernel - disabled
- partial fixes in OCL aub tests


Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2021-12-02 16:30:58 +01:00
Bartosz Dunajski
995cb88bfa Improve ftr/wa flags packing 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-11-25 16:05:57 +01:00