Rename function to getDebugSipKernel and select either bindless
or heapless depending on mode
Related-to: NEO-8396
Signed-off-by: Brandon Yates <brandon.yates@intel.com>
Currently we are reading fifo_head from local copy of saved
stateSaveAreaHeader.
However, during fifo read dbgUMD is reading FIFO entries and
accordingly SIP would also update fifo_head.
Hence while accessing fifo_head, ensure that we always read
fifo_head from latest in memory state save area header.
Related-To: NEO-12787
Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
- In global bindless mode SBA may be programmed for scratch allocation,
missing sba capturing caused issues for kernels with scratch.
- this fix adds SBA capturing after SBA command
Related-To: NEO-7063
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
When a thread is stopped due to potential page fault
we must check AIP against start IP to ensure it is not
a newly started thread accidentally caught by PF algorithm
Related-to: NEO-8617
Signed-off-by: Brandon Yates <brandon.yates@intel.com>
- check threads with attention state before reading SR_IDENT
- memory read is costly, for threads already in stopped state
there is no need to read sr_ident and check thread state again
- single stepping one thread performance is substantially improved,
by the factor of 6x
Related-To: NEO-8183
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
System Routine changes for implementing large-grf debugging
will result in GRF count of 256 being reported for kernels
in all GRF modes. Applications using L0 Debug API do not
yet have a way to determine actual GRF count for kernel.
This commit is a temporary adjustment to avoid breaking debug
API users after new system routine is enabled.
This problem will be fully solved in follow up patch with switch to
zetDebugGetThreadRegisterSetProperties
Related-to: NEO-7370
Signed-off-by: Brandon Yates <brandon.yates@intel.com>
Current SIP implementation has constant reg descs for all threads.
Initial implementation of this API always returns same reg descs as the
non-thread version of API. When SIP exposes per-thread reg descs,
this API will be updated to expose them.
Related-to: NEO-7370
Signed-off-by: Brandon Yates <brandon.yates@intel.com>
- when resume(all) is called - all threads' sr counter needs to be
verified. Reading state save area separately for all threads takes
longer than reading whole state save area once. State save area is
only read again if sr counter wasn't updated
- fail while reading state save area means threads might have completed
execution
- this fix optimizes time spent in resume(all), that may be called before
debugger detaches
Related-To: NEO-7897
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
- reading state save area for every threads takes too long when all
application threads have completed and there are stale ATT events to
process
- on detach gdb seemed to be frozen waiting for ATT event to be handled
- fix is to read state save area once - and check SIP counter for every
thread in ATT bitmask
Related-To: NEO-7897
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
- before marking interrupt request check exception reason. If there is
exception other than forced exception or forced external halt treat
thread as stopped and generate distinct event for it.
Related-To: NEO-7869
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
- threads with pending events cannot be resumed by resume(all) as they
they were not yet discovered by debugger as stopped.
- set reportAsStopped when THREAD_STOPPED event is read
- when resuming, only resume a thread when it was reported
Related-To: NEO-7817
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
- read/write registers/memory only allowed for threads reported as
stopped by events
- threads newly stopped, accidentally, that are resumed immediately
are not allowed register/memory access
Related-To: NEO-7776
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
Register read/write implementation was unnecessarily checking magic values
which were taking significant time. By removing those checks, register
access is speed-up by a factor of 3.
Resolves: NEO-7754
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
