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268393d7764e478658190ae2bc9f2cfcab5347b8
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86 Commits

Author SHA1 Message Date
Katarzyna Cencelewska
0b68fdbe52 Move isCooperativeEngineSupported to HwInfoConfig 
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-05-12 12:10:23 +02:00
Kamil Kopryk
fb4b1cca4f Use internal blitter for internal memory transfers 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6621
 2022-05-11 19:33:00 +02:00
Daria Hinz
5ba56690f5 Revert "Set only base values in GT_SYSTEM_INFO for AOT" 
This reverts commit b1f622d700.

Signed-off-by: Daria Hinz <daria.hinz@intel.com>
 2022-05-09 12:42:09 +02:00
Dominik Dabek
6e8cabdce5 Split wait for timestamps to queue and event 
On PVC both enabled.
On DG2 only for events.

Related-To: NEO-6948

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-05-06 15:34:47 +02:00
Lukasz Jobczyk
0b4ea8d2eb Do not enable engines round robin on all xe_hp and later products 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-05-06 12:30:53 +02:00
Bartosz Dunajski
f8ce86b116 XE_HPC: Fallback path to fix PAT_INDEX programming 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-05-05 15:06:21 +02:00
Daria Hinz
b1f622d700 Set only base values in GT_SYSTEM_INFO for AOT 
In most cases, there was code redundancy, which was minimized in this change.
The setupHardwareInfoBase extraction will also be used in ocloc.

Signed-off-by: Daria Hinz <daria.hinz@intel.com>
Related-To: NEO-6910
 2022-05-04 10:36:26 +02:00
Filip Hazubski
55dcca993c Apply getPaddingForISAAllocation PVC implementation to PVC and later platforms 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-04-27 15:55:39 +02:00
Filip Hazubski
3900c9d24a Report to StreamProperties whether large grf should be programmed with SCM 
Add helper method to UnitTestHelper to query programmed grf values.

Related-To: NEO-6659

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-04-27 13:20:14 +02:00
Bartosz Dunajski
06fa316a75 Assign pat_index to BO during creation 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-04-21 13:25:13 +02:00
Kamil Kopryk
10be59cb15 Improve isIpSamplingSupported helper 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6738
 2022-04-20 17:02:20 +02:00
Kamil Kopryk
a0bf3a2933 Improve xe_hpc revs 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6738
 2022-04-20 08:58:17 +02:00
Lukasz Jobczyk
b15c8e971c Move isTimestampWaitSupported method to different file 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-04-15 13:20:02 +02:00
Daria Hinz
7a324051ef Clean up headers & cmake files 
Files that were dedicated to specific platforms were incorrectly
attached at the level of the supported gen.
Additionally, header inclusion has been corrected.

Signed-off-by: Daria Hinz <daria.hinz@intel.com>
 2022-04-13 16:48:26 +02:00
Brandon Yates
d70b1a2e2a Filter L0 Debugger support by platfom 
Related-To: NEO-6678
Signed-off-by: Brandon Yates <brandon.yates@intel.com>
 2022-04-13 13:03:40 +02:00
Krystian Chmielewski
ee0d183cf9 Handle legacy hasBarriers properly 
Previous change regarding NEO-6785 added encoding of number of barriers
to specific value representation depending on hardware that we program for.

In patch token format encoding of number of barriers is sent via
hasBarriers field in a token.
In zebin true number of barriers is sent via barrier_count field in
zeInfo.

To remove this discrepancy, translate encoded number of barriers into
true number of barriers in legacy format.

Resolves: NEO-6785

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
 2022-04-12 09:44:10 +02:00
Bartosz Dunajski
884d729e4e Improve pat index programming on linux 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-04-12 08:18:20 +02:00
Daria Hinz
ce645f13b7 Encode PRODUCT_CONFIG value into fatbinary 
Change modifies the encoding entry in fatbinary for platforms.
If numbering in -device is used, the value PRODUCT_CONFIG will be encoded.
The functionality that returns the correct product config values has
also been added.

Related-To: NEO-6744
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
 2022-04-11 15:09:17 +02:00
Krystian Chmielewski
2c1bfbb5b2 Encode number barriers 
When programming number of barriers use BARRIER_SIZE enumeration.
Resolves: NEO-6785

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
 2022-04-08 10:32:23 +02:00
Bartosz Dunajski
db9c0d1103 Refactor and enable MI_MEM_FENCE programming for DirectSubmission dispatch 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-04-07 12:53:56 +02:00
Filip Hazubski
d2462ff8fb Add debug flag to control ISA allocation padding 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-04-04 15:12:30 +02:00
Mateusz Jablonski
7f6296174c Add PVC device ids 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-04-04 10:48:59 +02:00
Bartosz Dunajski
08e3853982 Debug flag to add extra MI_MEM_FENCE for DirectSubmission 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-03-30 16:07:25 +02:00
Compute-Runtime-Validation
91cfd3cd1a Revert "Unify command/ring/semaphore buffers placement" 
This reverts commit e035199de4.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-03-30 14:05:47 +02:00
Mateusz Jablonski
e035199de4 Unify command/ring/semaphore buffers placement 
put them all to the same memory location

Related-To: NEO-6698
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-03-29 17:55:48 +02:00
Zbigniew Zdanowicz
9858438121 Limit multiple partition count to compute command lists 
Related-To: NEO-6811

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-03-29 07:29:08 +02:00
Kamil Kopryk
f3bf5498a4 Fix typo 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-03-24 12:34:48 +01:00
Krzysztof Gibala
ebc006ad53 Move SBA related WAs logic from CSR to EncodeWA 
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2022-03-24 12:24:56 +01:00
Kamil Kopryk
c56046fd29 Move pvcSteppingBits to PVC struct 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6738
 2022-03-24 11:56:39 +01:00
Kamil Kopryk
c415edaba1 Improve isGlobalFenceInCommandStreamRequired helper 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6738
 2022-03-24 11:27:54 +01:00
Kamil Kopryk
ea3eb2ea23 Improve hwInfoConfig xe_hpc_core helper 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6738
 2022-03-24 11:17:58 +01:00
Mateusz Jablonski
8a8b4866cb XeHPC: force local memory for command/ring/semaphore buffer 
require 48bit resource for ring/semaphore buffer
for multi tile allocations select first tile
for single tile allocation select preferred tile

Related-To: NEO-6698
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-03-24 10:54:26 +01:00
Jitendra Sharma
f52f3df274 Add platform specific getter of debug surface size 
For different platforms based on number of available threads
and debug surface layout, calculate max debug surface size.

Related-To: NEO-6676
Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
 2022-03-22 12:18:40 +01:00
Kamil Kopryk
04a141698e Improve getThreadEuRatioForScratch helper 
Related-To: NEO-6738

Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-03-22 10:47:02 +01:00
Mateusz Jablonski
3792481d33 XeHPC Implicit scaling: put command/ring/semaphore buffer to first memory bank 
In direct submission scenario command/ring/semaphore buffer allocations
are placed in the same memory bank to ensure that their memory is updated in
correct order

Related-To: NEO-6698
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-03-21 08:10:50 +01:00
Filip Hazubski
32b0f7b014 Remove redundant value CsrSizeRequestFlags::numGrfRequiredChanged 
Related-To: NEO-5995

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-03-15 15:08:15 +01:00
Kamil Kopryk
a20edd7160 Correct xe_hpc_core files 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6631
 2022-03-15 09:28:18 +01:00
Daria Hinz
452050ae40 Refactoring the use of PVC device ids 
Replacing the old device id implementation
& clearing PVC XT temporary.

Related-To: NEO-6742
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
 2022-03-14 15:54:52 +01:00
Kamil Kopryk
7d6bee26c7 Move pvc helpers to pvc files 
Related-To: NEO-6631
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-03-11 13:46:59 +01:00
Michal Mrozek
6b29b03c29 Change default thread arbitration policy on PVC. 
New default is round robin after stall.
Resolves: NEO-6731

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2022-03-11 09:20:53 +01:00
Bartosz Dunajski
b8028d79c7 PVC: Fix compute units for scratch calculation 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-03-10 14:04:58 +01:00
Lukasz Wesierski
9d4dacacca Add report of extensions 
cl_intel_subgroup_matrix_multiply_accumulate and
cl_intel_subgroup_split_matrix_multiply_accumulate

Related-To: NEO-6745
Signed-off-by: Lukasz Wesierski <lukasz.wesierski@intel.com>
 2022-03-09 17:47:42 +01:00
Kamil Kopryk
038d1d54fa Correct xe_hpc tests 
Related-To: NEO-6631


Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-03-09 09:21:30 +01:00
Filip Hazubski
80b520bc9b Change ThreadArbitrationPolicy enum type to int32_t 
Change ThreadArbitrationPolicy::NotPresent value to -1
Update initial values to ThreadArbitrationPolicy::NotPresent

Related-To: NEO-6728

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-03-07 20:04:24 +01:00
Lukasz Jobczyk
3905fa7540 [PVC] Enable direct submission on main BCS 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-03-07 14:32:02 +01:00
Michal Mrozek
a0084d4e44 Move command buffers on PVC to local memory. 
Better performance of fetching commands.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2022-03-04 15:26:24 +01:00
Daria Hinz
0c6863766a Set device ids for PRODUCT_CONFIG 
Ocloc must set the default device id if the user
selects <major>.<minor>.<revision> pattern.

Signed-off-by: Daria Hinz <daria.hinz@intel.com>
 2022-02-25 18:01:40 +01:00
Aravind Gopalakrishnan
16f2fbbc37 [9/n] L0 immediate commandlist improvements 
Add HwInfo utility for more fine-grained flush task enablement
Related-To: LOCI-1988

Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
 2022-02-18 19:51:28 +01:00
Aravind Gopalakrishnan
74cdd60255 [7/n] L0 immediate commandlist improvements 
Enable flushTask only for specific families for now

Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
 2022-02-15 18:43:30 +01:00
Krzysztof Gibala
02c87fd8b9 Refactor naming around additional PC before NP state command 
Rename:
- debug flag ProgramPipeControlPriorToNonPipelinedStateCommand
to ProgramExtendedPipeControlPriorToNonPipelinedStateCommand
- local variables

Related-To: NEO-6615
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2022-02-11 19:24:14 +01:00