Commit Graph

8 Commits

Author SHA1 Message Date
Mateusz Jablonski
187120f44e Program Media Sampler DOP Clock Gate Enable on Xe Hp Sdv
remove skipped tests

Related-To: NEO-6466

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2021-12-30 16:45:40 +01:00
Mateusz Jablonski
6a39bcc395 Dont program Media Sampler DOP Clock Gate Enable on Xe platforms
Related-To: NEO-6466

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2021-12-22 15:35:22 +01:00
Mateusz Jablonski
263becc3f8 refactor CFE state programming
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2021-11-30 12:51:23 +01:00
Mateusz Hoppe
de7195d174 Fix fusedEuDispatch programming and minimum wg size
Related-To: NEO-6455

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2021-11-24 12:16:30 +01:00
Szymon Morek
897420236a Add method to set systolic mode
Resolves: NEO-6040

Signed-off-by: Szymon Morek szymon.morek@intel.com
2021-09-30 10:39:56 +02:00
Mateusz Hoppe
0e58821455 Change DebugMode and TdCtl registers on xehp
- refactor tests to use UnitTestHelper

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2021-09-24 07:38:48 +02:00
Bartosz Dunajski
d8a98acafd Set SingleSliceDispatchCcsMode for EngineInstanced OsContext
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2021-08-18 13:02:16 +02:00
Szymon Morek
aa5e1780a2 Rename plus in filenames to and_later
Related-To: NEO-5920

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2021-08-17 11:26:27 +02:00