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2e09b5ff663584dee3e97059c90ff0e3663ed324
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318 Commits

Author SHA1 Message Date
Zbigniew Zdanowicz
2e09b5ff66 refactor: reposition preamble helper implementation methods 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-10-20 13:18:29 +02:00
Dunajski, Bartosz
25195ebc96 fix: capability to write memory chunk in aub/tbx mode 
Related-To: GSD-6604

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-10-19 19:13:11 +02:00
Dunajski, Bartosz
af7bcbf99c Revert "refactor: split CpuInaccessible MemoryPool types to Device and System" 
This reverts commit 2e8cf5fdf5.

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-10-17 10:03:14 +02:00
Dunajski, Bartosz
2e8cf5fdf5 refactor: split CpuInaccessible MemoryPool types to Device and System 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-10-16 12:47:13 +02:00
Pawel Cieslak
6e481535d0 fix: fix compilation issues when building with clang-16 
Related-To: NEO-8284
Signed-off-by: Pawel Cieslak <pawel.cieslak@intel.com>
 2023-10-11 15:08:01 +02:00
Mateusz Jablonski
fd7c750cf7 fix: ensure local variable address is not exposed outside of function 
Related-To: NEO-9038
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-10-06 15:59:16 +02:00
Mateusz Jablonski
fc508212de refactor: pass big parameters as reference instead of by value 
Related-To: NEO-9038
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-10-04 14:53:13 +02:00
Zbigniew Zdanowicz
0a99384936 fix: set flushed task count for all cases of post sync task count operations 
- set monitor fence dispatch for all cases task count post sync operation
- stand alone flush task count will not happen when already flushed and so
monitor fence
- monitor fence then must be dispatched together with task count post sync

Related-To: NEO-8395

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-10-03 12:31:45 +02:00
Dominik Dabek
eebf2bbd26 performance(ocl): timestamp packet count per gfx 
Add support for different timestamp packet counts per gfx family.
Change all packet counts to 1 except for xe-hpc.

Related-To: NEO-8154

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-09-25 20:34:58 +02:00
Dunajski, Bartosz
80d0c74605 fix: track registered CSR clients 2 
Related-To: NEO-8884

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-09-25 09:35:55 +02:00
Compute-Runtime-Validation
ade538ce54 Revert "fix: track registered CSR clients" 
This reverts commit 53f635e392.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2023-09-24 10:07:26 +02:00
Dunajski, Bartosz
53f635e392 fix: track registered CSR clients 
In L0 its not possible to track objects relations. For example CmdList
may be removed before Event.
In such case, Event needs to safely skip unregister call, without
accessing CmdList/CmdQueue object.

Related-To: NEO-8884

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-09-22 09:42:55 +02:00
Mateusz Hoppe
69f5ca6345 feature: bindless addressing - flush state cache after reusing SS slot 
- when Surface State is reused for new resource, State Cache needs to be
invalidated

Related-To: NEO-7063

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2023-09-20 12:53:32 +02:00
Dominik Dabek
1b7e178b25 performance(ocl): program barrier pc in taskStream 
Program barrier to task stream, before next enqueue kernel.
This will reduce the number of batch buffer starts for sequences of
enqueue, barrier, enqueue, ... .

Related-To: NEO-8147

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-09-19 11:48:02 +02:00
Baj, Tomasz
e10f39017d fix: Add ImageInfo to createGraphicsAllocation on Linux 
Related-To: NEO-6757

Signed-off-by: Baj, Tomasz <tomasz.baj@intel.com>
 2023-09-14 12:58:59 +02:00
Mrozek, Michal
d9f938f3db refactor: remove not needed code 
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2023-09-12 14:25:04 +02:00
Compute-Runtime-Validation
b5e9c10f64 Revert "performance(ocl): program barrier pc in taskStream" 
This reverts commit 839c2d6737.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2023-09-12 01:32:28 +02:00
Dominik Dabek
839c2d6737 performance(ocl): program barrier pc in taskStream 
Program barrier immediately to task stream.
This will reduce the number of batch buffer starts.

Related-To: NEO-8147

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-09-11 13:23:26 +02:00
Maciej Plewka
3b3e17e738 performance: Use vector for private allocs to reuse 
Related-To: HSD-18033105655, HSD-18033153203

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2023-09-04 13:34:38 +02:00
Maciej Plewka
5807d512b3 fix: Reuse private allocations during cmdList dispatch 
Related-To: NEO-8201

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2023-08-31 14:40:55 +02:00
Mateusz Jablonski
824a98815e test: unify tests compute mode programming within Xe Hpg 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-08-31 09:02:10 +02:00
Zbigniew Zdanowicz
54fce64583 fix: set the indirect object address stream property when not set already 
Related-To: NEO-8281

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-08-30 15:51:24 +02:00
Zbigniew Zdanowicz
873b3d4241 fix: do not process scratch space when no surface heap pointer provided 
Related-To: NEO-8281

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-08-22 17:44:35 +02:00
Mateusz Jablonski
f5d683063b test: pass empty execution environment when preparing device environments 
Related-To: NEO-8187

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-08-02 13:05:34 +02:00
Dominik Dabek
12ab74fe96 performance: flag to program barrier in task cs 
Add debug flag ProgramBarrierInCommandStreamTask to program barrier
pipe control in task command stream instead of csr command stream.
This will reduce the number of batch buffer starts.

Related-To: NEO-8147

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-08-02 10:26:34 +02:00
Igor Venevtsev
e2ad2e8db0 fix: initialize GPU VA for additional synchronization WA 
Related-To: NEO-8072

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2023-08-01 11:43:52 +02:00
Mateusz Hoppe
997b599168 fix(debugger): pass correct sipAllocation to makeResident 
- sipAllocation for context must be resident in Offline mode

Related-To: NEO-7630

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2023-07-28 20:51:12 +02:00
Dunajski, Bartosz
cd9ad1f04c fix: decanonize GPU VA during TBX memory read. 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-07-26 19:44:19 +02:00
Dunajski, Bartosz
a241099dff feature: use WaitUserFence on zeEventHostSynchronize 
Disabled by default. Debug flag is required.

Related-To: NEO-7966

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-07-26 19:41:09 +02:00
Dunajski, Bartosz
2c50fd9486 fix: waiting for completion in TBX mode 
- use testTaskCountReady method to check TaskCount value
- download all allocations when TaskCount is ready

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-07-25 11:54:09 +02:00
Compute-Runtime-Validation
8c155a2e89 Revert "performance: Memory handling improvements" 
This reverts commit 5b80bd4d7c.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2023-07-20 11:37:09 +02:00
Artur Harasimiuk
1434872427 refactor: remove unused code 
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2023-07-20 11:09:55 +02:00
Filip Hazubski
5b80bd4d7c performance: Memory handling improvements 
By default prefer allocating memory first by KMD, instead of malloc first.

By default prefer not caching allocations on MTL devices. This results
in allocations being handled with non-coherent pat index.

For integrated devices when caching is not preferred do not allow
direct memory access in CPU domain. For map/unmap operations create
a dedicated memory allocation for CPU access, instead of accessing it
directly, reusing the same logic as when mapping/unmapping local memory.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2023-07-19 19:21:44 +02:00
Dominik Dabek
622a3ed89c performance(ocl): flag to not dcFlush on no event 
If waitForBarrier is not passed outEvent then do
dcFlush on the next synchronize call.

Related-To: NEO-8147

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-07-18 15:38:54 +02:00
Zbigniew Zdanowicz
1c0285a156 fix: correct alignment of per thread scratch size 
Related-To: NEO-5288

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-07-12 12:31:47 +02:00
Zbigniew Zdanowicz
3f7269d401 fix: make sip state programing once for all level zero command queues 
Related-To: NEO-7828

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-07-11 11:34:21 +02:00
Zbigniew Zdanowicz
8836838c7c performance: add one time context init sip state to immediate flush task 
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-07-06 14:25:35 +02:00
Zbigniew Zdanowicz
59949bc833 performance: add one time context init csr surface to immediate flush task 
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-07-05 16:18:21 +02:00
Zbigniew Zdanowicz
69d80ee5bc performance: add one time context init preemption mode to immediate flush task 
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-07-05 14:06:14 +02:00
Zbigniew Zdanowicz
e52e4f28f2 fix: correct csr state and command programming 
- global stateless mode should save surface state base address
- correctly retrieve scratch offset for front end programming
- do not override general base address value and use indirect heap property

Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-07-03 15:55:55 +02:00
Zbigniew Zdanowicz
21823af419 performance: add skeleton method to cmdlist immediate flush task 
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-06-30 10:46:20 +02:00
Zbigniew Zdanowicz
eb4e7fb2a6 performance: immediate flush add flushing mechanism to gpu 
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-06-29 15:52:13 +02:00
Zbigniew Zdanowicz
b3ebcfe811 performance: immediate flush add ending commands to command list buffer 
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-06-28 08:22:29 +02:00
Zbigniew Zdanowicz
bd15d067d5 performance: immediate flush add jump to batch buffer when preamble is present 
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-06-23 09:28:15 +02:00
Zbigniew Zdanowicz
c37dbc4cf0 performance: add one time context init ray tracing to immediate flush task 
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-06-21 18:27:31 +02:00
Zbigniew Zdanowicz
67b74e211d performance: add one time context init partition data to immediate flush task 
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-06-20 14:45:37 +02:00
Zbigniew Zdanowicz
7aff4e1bf4 performance: add one time context init system fence to immediate flush task 
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-06-20 07:25:09 +02:00
Zbigniew Zdanowicz
1146f42bcb performance: add scratch space handling to immediate flush task 
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-06-16 13:08:35 +02:00
Zbigniew Zdanowicz
305f24ec9d performance: add state base address dispatch to immediate flush task 
Related-To: NEO-7808

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-06-14 18:00:04 +02:00
Dominik Dabek
60d5e22f3b fix(ocl): reduce busy waiting in clFinish 
Use flushStamp=taskCount when passed flushStamp==0.
This will cause driver to busy wait for a short while before falling
back to use kmd notify.

Related-To: GSD-3612

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-06-14 13:56:40 +02:00