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845 Commits

Author SHA1 Message Date
Dunajski, Bartosz
2e8cf5fdf5 refactor: split CpuInaccessible MemoryPool types to Device and System 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-10-16 12:47:13 +02:00
Compute-Runtime-Validation
30b066c40e Revert "fix: synchronize host and device timers to avoid device timer overflow" 
This reverts commit dae8c34f81.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2023-10-16 11:16:23 +02:00
Mateusz Jablonski
dae8c34f81 fix: synchronize host and device timers to avoid device timer overflow 
Related-To: NEO-8394
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-10-13 17:40:45 +02:00
Dominik Dabek
eebf2bbd26 performance(ocl): timestamp packet count per gfx 
Add support for different timestamp packet counts per gfx family.
Change all packet counts to 1 except for xe-hpc.

Related-To: NEO-8154

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-09-25 20:34:58 +02:00
Dunajski, Bartosz
80d0c74605 fix: track registered CSR clients 2 
Related-To: NEO-8884

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-09-25 09:35:55 +02:00
Compute-Runtime-Validation
ade538ce54 Revert "fix: track registered CSR clients" 
This reverts commit 53f635e392.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2023-09-24 10:07:26 +02:00
Dunajski, Bartosz
53f635e392 fix: track registered CSR clients 
In L0 its not possible to track objects relations. For example CmdList
may be removed before Event.
In such case, Event needs to safely skip unregister call, without
accessing CmdList/CmdQueue object.

Related-To: NEO-8884

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-09-22 09:42:55 +02:00
Dominik Dabek
ace5e67b51 test(ocl): negative test, split barrier required 
Test for splitBarrierRequired not being set on
enqueueMarkerWithWaitList.

Related-To: NEO-8147

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-09-21 18:16:36 +02:00
Dunajski, Bartosz
d3d5da1f72 feature: initial 64b in-order CmdList support 
Related-To: NEO-7966

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-09-19 15:23:37 +02:00
Dominik Dabek
1b7e178b25 performance(ocl): program barrier pc in taskStream 
Program barrier to task stream, before next enqueue kernel.
This will reduce the number of batch buffer starts for sequences of
enqueue, barrier, enqueue, ... .

Related-To: NEO-8147

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-09-19 11:48:02 +02:00
Dominik Dabek
ee767822b8 performance(ocl): add bcsEngineCount to cmdq 
Related-To: NEO-8155

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-09-15 15:49:56 +02:00
Mateusz Jablonski
d4f80fb957 test: correct scope of unit test 
ensure that getHwRevIdFromStepping is not defined for MTL+

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-09-13 11:56:56 +02:00
Dunajski, Bartosz
7562842a58 refactor: remove LogicalStateHelper 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-09-13 10:29:53 +02:00
Mrozek, Michal
15a0bf9d7b refactor: remove not needed code. 
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2023-09-12 13:52:47 +02:00
Dunajski, Bartosz
2a6be2fccd feature: update conditional bb start to use qword data 
Related-To: NEO-8242

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-09-12 11:24:28 +02:00
Mrozek, Michal
ae4757711e refactor: remove not needed code 
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2023-09-12 09:39:01 +02:00
Compute-Runtime-Validation
b5e9c10f64 Revert "performance(ocl): program barrier pc in taskStream" 
This reverts commit 839c2d6737.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2023-09-12 01:32:28 +02:00
Dominik Dabek
839c2d6737 performance(ocl): program barrier pc in taskStream 
Program barrier immediately to task stream.
This will reduce the number of batch buffer starts.

Related-To: NEO-8147

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-09-11 13:23:26 +02:00
Lukasz Jobczyk
a38ac3557b performance: Disable blit enqueue on xe_lpg 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2023-09-11 13:10:23 +02:00
Compute-Runtime-Validation
7b5ef1b2f4 Revert "performance: Disable blit enqueue on xe_lpg" 
This reverts commit ac97b1c493.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2023-09-11 10:10:21 +02:00
Michal Mrozek
65188fc90b refactor: remove not needed code 
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2023-09-08 17:22:18 +02:00
Lukasz Jobczyk
ac97b1c493 performance: Disable blit enqueue on xe_lpg 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2023-09-08 14:04:24 +02:00
Dunajski, Bartosz
8f6183e758 fix: check queue post post completion resources when releasing Event 
Related-To: NEO-8316

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-09-04 08:23:56 +02:00
Maciej Plewka
2e249d819e fix: submit marker for cpu transfer with event on IOQ queue 
Related-To: NEO-8081

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2023-08-21 15:07:37 +02:00
Dunajski, Bartosz
3cf1f5c462 fix: unregister CSR client on OCL sync points 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-08-16 13:35:07 +02:00
Dunajski, Bartosz
a42e88d55b fix: stall RelaxedOrdering scheduler when programming OCL dependencies 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-08-14 10:47:35 +02:00
Fabian Zwolinski
6fca8ee195 refactor: Remove SourceLevelDebugger 
Removed:
- SourceLevelDebugger (with tests)
- DebuggerLibrary
- DebuggerLibraryRestore
- debuggerSupported field from hwInfo.capabilityTable
- HasSourceLevelDebuggerSupport matcher
- ExperimentalEnableSourceLevelDebugger debug var
- EnableMockSourceLevelDebugger debug var
- DebuggerOptDisable debug var
- lib_names.h.in file
- third_party/source_level_debugger/igfx_debug_interchange_types.h

Related-To: NEO-7213
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
 2023-08-10 11:14:02 +02:00
Mateusz Jablonski
db12dc78a8 test: reduce gpu hang check period in test expecting gpu hang 
this reduces test execution time by 500 ms

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-08-04 08:49:51 +02:00
Filip Hazubski
12af65a970 fix: Change default value of EnableCpuCacheForResources debug toggle 
This change disables CPU caching for resources
not accessed by CPU for MTL devices.

Related-To: NEO-7194

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2023-07-31 09:15:43 +02:00
Mateusz Hoppe
997b599168 fix(debugger): pass correct sipAllocation to makeResident 
- sipAllocation for context must be resident in Offline mode

Related-To: NEO-7630

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2023-07-28 20:51:12 +02:00
Mateusz Jablonski
f84f22d23c refactor: remove unused isSharedContext variable 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-07-26 12:14:23 +02:00
Dunajski, Bartosz
6656e23b86 refactor: unify completion check methods 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-07-25 14:17:52 +02:00
Dunajski, Bartosz
2c50fd9486 fix: waiting for completion in TBX mode 
- use testTaskCountReady method to check TaskCount value
- download all allocations when TaskCount is ready

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-07-25 11:54:09 +02:00
Cencelewska, Katarzyna
6f45574ff9 fix: add proper bcs synchronization when marker 
Related-To: NEO-8105
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
 2023-07-24 10:57:41 +02:00
Compute-Runtime-Validation
8c155a2e89 Revert "performance: Memory handling improvements" 
This reverts commit 5b80bd4d7c.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2023-07-20 11:37:09 +02:00
Filip Hazubski
5b80bd4d7c performance: Memory handling improvements 
By default prefer allocating memory first by KMD, instead of malloc first.

By default prefer not caching allocations on MTL devices. This results
in allocations being handled with non-coherent pat index.

For integrated devices when caching is not preferred do not allow
direct memory access in CPU domain. For map/unmap operations create
a dedicated memory allocation for CPU access, instead of accessing it
directly, reusing the same logic as when mapping/unmapping local memory.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2023-07-19 19:21:44 +02:00
Dominik Dabek
622a3ed89c performance(ocl): flag to not dcFlush on no event 
If waitForBarrier is not passed outEvent then do
dcFlush on the next synchronize call.

Related-To: NEO-8147

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2023-07-18 15:38:54 +02:00
Dunajski, Bartosz
815b37bf3a performance: allow waiting for OOQ timestamps in clEnqueueWaitForEvents 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-07-14 11:33:10 +02:00
Zbigniew Zdanowicz
1c0285a156 fix: correct alignment of per thread scratch size 
Related-To: NEO-5288

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2023-07-12 12:31:47 +02:00
Cencelewska, Katarzyna
aa0beb8191 fix: Unify logic calculating threads per work group part 4 
- also use helper when checking that is simd1 to have same flow

Related-To: NEO-8087
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
 2023-07-07 15:34:59 +02:00
Dunajski, Bartosz
00bae2c827 fix: add missing nullptr check 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-07-07 11:34:49 +02:00
Cencelewska, Katarzyna
61f701aba5 fix: Unify logic calculating threads per work group part 3 
Related-To: NEO-8087
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
 2023-07-04 15:27:44 +02:00
Cencelewska, Katarzyna
7cb3278eb3 fix: add function to calculate number of threads per tg 
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
 2023-06-13 14:02:24 +02:00
Mateusz Jablonski
4f72835b7d fix: create dedicated class for root device indices to store unique values 
remove method to removing duplicates from StackVec as the method
implicitly sorted the vector

Related-To: GSD-4692
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-06-12 22:24:06 +02:00
Dunajski, Bartosz
5fe9d70066 feature: new multitile post sync layout for immediate write [1/n] 
No functional changes in this commit. This is prework.

Related-To: NEO-7966

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2023-06-07 13:11:10 +02:00
Kacper Nowak
d05fee8087 fix(ocl): Use GPU address of SVM alloc. when using builtins 
Use GPU address of SVM allocation instead of CPU one. It fixes a bug
visible on platforms, where potentially GPU VA does not have to match
CPU VA.

Related-To: NEO-7970
Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
 2023-05-26 13:39:14 +02:00
Lukasz Jobczyk
0e758e4bb5 performance: Add debug flag to set BCS split minimal size 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2023-05-17 08:07:43 +02:00
Lukasz Jobczyk
9f755b54ad performance: Bidirectional BCS split implementation for OCL 
Related-To: NEO-7877

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2023-05-16 13:34:18 +02:00
Mateusz Jablonski
425a2a6fa2 fix: set NotLockable flag when resource does not need to be lockable 
disable compression preference when resource is lockable

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2023-05-15 16:47:21 +02:00
Naklicki, Mateusz
71e5c76d67 fix: remove explicit AgeBased Thread Arbitration policy 
Related-To: NEO-7913
Signed-off-by: Naklicki, Mateusz <mateusz.naklicki@intel.com>
 2023-05-15 09:58:04 +02:00