intel/compute-runtime
1
0
Fork 0
mirror of https://github.com/intel/compute-runtime.git synced 2025-12-22 10:17:01 +08:00
Code Issues Packages Projects Releases Wiki Activity
10,586 Commits 42 Branches 655 Tags
31dbc04f239232c90afd34af7b2fc44c28ae9199
Commit Graph

2714 Commits

Author SHA1 Message Date
Mateusz Hoppe
31dbc04f23 L0Debug - capture SurfaceState heaps 
Related-To: NEO-7103

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2022-06-24 15:05:56 +02:00
Lukasz Jobczyk
94f3e54261 Move semaphore to local memory on XE_HPG 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-06-24 14:36:23 +02:00
Bartosz Dunajski
61b2ee45cd Use LogicalStateHelper to encode SystemMemoryFence 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-06-24 13:29:58 +02:00
Filip Hazubski
4ece30528c Do not force SingleSliceDispatchCcsMode when dispatch all is enabled 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-06-23 12:35:48 +02:00
Mateusz Hoppe
673bf3b553 Move DebuggerL0 to shared 
Related-To: NEO-7075

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2022-06-23 10:05:45 +02:00
Bartosz Dunajski
0b5269d4ae Use LogicalStateHelper to program CSR allocation 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-06-22 21:19:57 +02:00
Compute-Runtime-Validation
1bfe42350a Revert "Disable tlb flush WA on PVC and later" 
This reverts commit e0c87435e1.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-06-22 20:09:28 +02:00
Igor Venevtsev
cb6db5672b Debugger L0 Win - register allocations metadata in debugger 
Related-To: NEO-6764

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2022-06-22 17:22:15 +02:00
Szymon Morek
2f46a7da63 Remove not needed function calls 
Related-To: NEO-7003

Minor: remove empty function calls

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2022-06-22 16:58:21 +02:00
Bartosz Dunajski
f4485ec541 Use LogicalStateHelper for SIP programming 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-06-22 13:46:57 +02:00
Lukasz Jobczyk
e0c87435e1 Disable tlb flush WA on PVC and later 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-06-22 13:09:42 +02:00
Filip Hazubski
b1a9fb886f Remove useChannelRedForUnusedShaderChannels helper function 
For CL_LUMINANCE images always force channel red.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-06-22 12:18:58 +02:00
Lukasz Jobczyk
5ea86b712f Bind virtual copy engines in optimal sequence 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-06-22 10:31:02 +02:00
Compute-Runtime-Validation
c45ddab1c3 Revert "Move DebuggerL0 to shared" 
This reverts commit 7eba4db2e7.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-06-22 04:38:32 +02:00
Katarzyna Cencelewska
4f8a6138b2 Add pvc tests 
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-06-21 23:38:03 +02:00
Mateusz Jablonski
70cef0cfe8 Create enum values for I915 tiling mode 
Related-To: NEO-6852, NEO-6999
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-06-21 23:33:50 +02:00
Mateusz Hoppe
7eba4db2e7 Move DebuggerL0 to shared 
Related-To: NEO-7075

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2022-06-21 17:10:46 +02:00
Mateusz Jablonski
64029eee20 Add enum values for memory classes 
Related-To: NEO-6852, NEO-6999
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-06-21 17:05:13 +02:00
Szymon Morek
9a26e505a8 Pass LSC policy to IGC in build options 
Related-To: NEO-7003


Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2022-06-21 11:51:56 +02:00
Maciej Plewka
6ab6e1abff Fix mutex order for event task and move args to gpu 
This commit fixes problem with untransfered shared usm memory to gpu
when there is submit to gpu trigerred by user event. Also there is a fix
for dead lock problem caused by mixed orders of locking mutexes in csr
and in direct submission controller.

Related-To: NEO-6762

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2022-06-21 11:28:25 +02:00
Kamil Kopryk
d308df254c Add ail for FAHBench on DG2 
Add missing synchronization in the FAHBench kernel
which caused hang on DG2.

Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6946
 2022-06-21 10:21:51 +02:00
Lukasz Jobczyk
f98c6b1a8b Disable round robin engine assign on PVC 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-06-20 15:24:18 +02:00
Daria Hinz
5745c3d99d Change AOT enums type & use forward declaration 
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
 2022-06-20 13:40:29 +02:00
Lukasz Jobczyk
9761098733 Track ccs count per subdevice in direct submission controller 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-06-20 11:52:01 +02:00
Katarzyna Cencelewska
615fd4c37a Add programming of Dispatch Walk Order in COMPUTE_WALKER for xe_hpg 
- update xe_hpg generated commands
- add method isAdjustWalkOrderAvailable

Related-To: NEO-7065
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-06-17 10:42:15 +02:00
Konstanty Misiak
bee5f91907 Add AIL for Wondershare Filmora 
Related-To: NEO-6982

Signed-off-by: Konstanty Misiak <konstanty.misiak@intel.com>
 2022-06-15 18:15:55 +02:00
Nowak, Kacper
b3d94add4b Set missing field for buffer_address kernel arg type 
Set missing pointerSize (basing on source size field) for buffer_address arg
type.
Signed-off-by: Nowak, Kacper <kacper.nowak@intel.com>
Related-To: NEO-7048
 2022-06-15 16:49:11 +02:00
Daniel Chabrowski
b5ee204d9c Move some os_interface tests to shared 
Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com>
 2022-06-15 15:17:16 +02:00
Bartosz Dunajski
ba156c7eaa Add writeStreamInline at the end of flushTask 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-06-15 12:34:51 +02:00
Compute-Runtime-Validation
3dd6e3f125 Revert "Enable Symbol Table Generation by Default for L0 modules" 
This reverts commit c2e3d24a1d.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-06-15 10:28:47 +02:00
Krzysztof Gibala
21c2f06d72 Remove redundant GmmHelper init in createDeviceImpl 
Initialization of GmmHelper is carried out earlier in the
prepareDeviceEnvironments method.

Related-To: NEO-6523
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2022-06-15 09:49:51 +02:00
Bartosz Dunajski
ce91edcb82 Add support for adding additional shared core files to cmake 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-06-15 09:43:47 +02:00
Michal Mrozek
31ca7fe9b4 Do not enable L3 for BCS transfers when they are big. 
When transfer is larger then half of L3 there is no need
to make it L3 cacheable, as it will cause evictions.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2022-06-15 08:57:17 +02:00
Compute-Runtime-Validation
930db249ff Revert "Enable Global Symbol Generation by Default for L0 modules" 
This reverts commit 9996228281.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-06-15 08:45:53 +02:00
Mateusz Jablonski
e67307b724 Add DrmParam enum values for I915_EXEC values 
Related-To: NEO-6852
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-06-15 08:39:39 +02:00
Daria Hinz
2637ae5816 Ocloc: Support for various variants of acronyms 
In addition to supporting the official -device acronyms
(e.g. xe-hpg), support for shorter and deprecated acronyms
has also been added.
An example of supported variances:
- xehpg
- xe_hpg
- xe_hpg_core

Signed-off-by: Daria Hinz <daria.hinz@intel.com>
Related-To: NEO-6910
 2022-06-14 22:49:01 +02:00
Neil R Spruit
9996228281 Enable Global Symbol Generation by Default for L0 modules 
Signed-off-by: Neil R Spruit <neil.r.spruit@intel.com>
 2022-06-14 22:36:08 +02:00
Zbigniew Zdanowicz
f5b1a0e45b Use internal event object in command lists methods 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-06-14 21:23:43 +02:00
Michal Mrozek
ef7c1c22cb Rename function name to avoid confusion. 
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2022-06-14 18:50:39 +02:00
Neil R Spruit
c2e3d24a1d Enable Symbol Table Generation by Default for L0 modules 
- Added EnableProgramSymbolTableGeneration to enable or disable default
behavior for IGC to generate the program symbol tables for L0 modules
with exported functions.
- Default value set to true to add -library-compilation to all module
builds.

Signed-off-by: Neil R Spruit <neil.r.spruit@intel.com>
 2022-06-14 18:10:24 +02:00
Joshua Santosh Ranjan
6adf069eb3 Metrics: Add NReports Event Generation support for EuStallSampling 
This patch adds support for NReports for EuStallSampling

Related-To: LOCI-2758

Signed-off-by: Joshua Santosh Ranjan <joshua.santosh.ranjan@intel.com>
 2022-06-14 17:15:23 +02:00
Bartosz Dunajski
939d109362 Add LogicalStateHelper class 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-06-14 16:57:16 +02:00
Daria Hinz
6d365cbfc3 Ocloc: New AOT design implementation 
Ocloc will handle any new values that may be
passed to the -device argument.

Supported acronyms are available under cmd:
ocloc compile --help

Supported patterns:
- device acronym
- release acronym
- family acronym
- version (major.minor.revision)

Fatbinary will no longer handle major.minor.revision variances,
only acronyms allowed.

Signed-off-by: Daria Hinz <daria.hinz@intel.com>
 2022-06-14 13:20:45 +02:00
Fabian Zwolinski
0966651a78 Create and implement WSL handle refreshing 
Additionally rename createResourceInfo overload to decodeResourceInfo.
createResourceInfo(GMM_RESOURCE_INFO *, GMM_RESOURCE_INFO) does not
create a new ResourceInfo, but decodes one on the basis of the provided
existing gmmResourceInfo.

Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
 2022-06-14 08:43:35 +02:00
Jaime Arteaga
d5bc7e66e7 Enable ZE_ENABLE_PCI_ID_DEVICE_ORDER by default 
Most customers use this already, so enable by default to have
consistent enumeration of devices.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2022-06-13 21:31:36 +02:00
Maciej Plewka
213dc2fe24 Make CPU copy for read buffer when host ptr is write combined on DG2 
With this commit on DG2 32bit driver will check if passed host ptr for
clEnqueueReadBuffer is write combined memory. If check will be true copy
will be make on CPU.

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2022-06-13 21:23:21 +02:00
Dominik Dabek
cdfe2ce8ad Feature: Flag for device usm allocation reusing 
With flag enabled, when app calls freeSVMAlloc on device usm allocation,
don't free it immediately but save it,
and try to use it on subsequent allocations.

This allocation cache will be trimmed if an allocation fails.

Related-To: NEO-6893

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-06-13 20:02:52 +02:00
Krzysztof Gibala
c229ace4df Adjust GmmHelper to be HW aware 
Related-To: NEO-6523
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2022-06-13 18:33:06 +02:00
Artur Harasimiuk
6d43e96dee style: configure readability-identifier-naming.ClassCase 
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2022-06-13 18:02:39 +02:00
Katarzyna Cencelewska
c59c4b2957 Add hwInfo as argument to method getSupportedDeviceFeatureCapabilities 
set proper value in method isMatrixMultiplyAccumulateSupported to be
consistent with support of extension *matrix_multiply_accumulate*

Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-06-13 15:03:43 +02:00