intel/compute-runtime
1
0
Fork 0
mirror of https://github.com/intel/compute-runtime.git synced 2026-01-01 12:33:12 +08:00
Code Issues Packages Projects Releases Wiki Activity
1,564 Commits 43 Branches 655 Tags
344e92acfa1804ba6f5de241af8a8483e64dd478
Commit Graph

1017 Commits

Author SHA1 Message Date
Kowalczuk, Jakub
344e92acfa Add source level debugger header from SDK 
Change-Id: I9898ec8892798facb71ccae0547c894b6b5a0288
 2018-11-23 12:22:08 +01:00
Mrozek, Michal
61e7ae9280 Refactor pipe control post sync programming. 
Change-Id: I81f4840345494c6d32679e29faaff786677cb4b0
 2018-11-23 11:42:32 +01:00
Mateusz Jablonski
d961bd8354 Implement deferrable allocation deletion 
Change-Id: I5e99d1bbb920619f63b71573335dc76f19c796a6
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-23 11:28:52 +01:00
Dunajski, Bartosz
3ad33bf1b8 Allow Device creating multiple CSRs [3/n] 
Add CSR from Device to CommandQueue

Change-Id: Iaccf3c73d25e357242837677777d0513e81f520e
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-23 10:51:34 +01:00
Dunajski, Bartosz
706d9f8070 Allow Device creating multiple CSRs [2/n] 
Create new OsContext per CSR

Change-Id: I8dad7fc1ab450e560f78eba3152b5913791e59a3
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-22 14:29:44 +01:00
Filip Hazubski
3cb8683fb4 Process extra properties for Context 
Change-Id: Ic4b3af368a734109188dcd725f1fcf8c17fbb59e
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2018-11-22 13:28:58 +01:00
Mateusz Jablonski
352450adaa Pass number of os contexts to Graphics Allocation constructor 
Mark unshareable allocations

Change-Id: Ie745dc639d8c6b01e2275d29ee1fb4c6343df2bc
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-21 17:38:02 +01:00
Pawel Wilma
2f15ca0508 Add AUB registry key for additional MMIO registers list 
Change-Id: Ib478e91d8df21c48f83bfa97a4ea72c41c2f065d
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-11-21 16:41:44 +01:00
Cetnerowski, Adam
469fe40072 Revert "Expose spirv extensions" 
This reverts commit bbc7afc952.

Change-Id: I103c55707b81745822bf355a1df011e0d0802e17
 2018-11-21 15:51:37 +01:00
Mrozek, Michal
e2c9a25d03 Add concept of chunks into timestamp packets. 
Change-Id: Ic9a978224862e237a7268525f05b059756da06e7
 2018-11-21 15:22:49 +01:00
Cetnerowski, Adam
d46969a7f2 Rename offline compiler: cloc -> ocloc 
Change-Id: I0595bac4c7266e77bd2ee17588694233547c8315
 2018-11-21 13:31:47 +01:00
Dunajski, Bartosz
af46d88fc1 Allow Device creating multiple CSRs [1/n] 
Change-Id: Ie5d8d89aa388c608d5464919059c28a054ac9b1e
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-21 12:37:25 +01:00
Maciej Dziuban
c4239dcd3d Refactor WddmResidencyController methods implementations 
- trimResidency
- trimResidencyToBudget
- makeResidentResidencyAllocations

Change-Id: Ibf81e31966c8d8347fd5caf2f6a4bf8fe75fab5f
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-11-21 12:05:37 +01:00
Artur Harasimiuk
ebfba1dc4a add libva to manifest 
Change-Id: I13f93a57754662a5f2d94a55fe23af0082b42de6
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-11-20 19:49:53 +01:00
Mrozek, Michal
3f63aeeb74 Remove redundant code. 
Change-Id: I3754c94671605db2545897d22b68b6c8e8aae9d1
 2018-11-20 12:25:24 +01:00
Adam Cetnerowski
bbc7afc952 Expose spirv extensions 
Change-Id: I64d05ed2bcc4c3ae005c39b9c22d0f67d7ca6a7e
 2018-11-20 11:52:02 +01:00
Dunajski, Bartosz
d6870a896b Reduce tag pool size to 1 for AUBs 
Change-Id: I3a3513250b10e899795e149bff2739193a725f84
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-20 11:42:32 +01:00
Stefanowski, Adam
96d07db545 Move wddm->init from wddmCSR to getDevices 
Change-Id: If88f526792596108e038ec05c1d305e9452506f2
 2018-11-20 09:40:57 +01:00
Venevtsev, Igor
6ea863e440 Fix Read/WriteBuffer for unaligned offsets 
Change-Id: Ia8daff3e95bd724a9f678eb471dbb44a66cc0bc7
 2018-11-20 09:25:12 +01:00
Mrozek, Michal
1c6fb9def4 Return pointer to clCreateBufferWithPropertiesINTEL. 
Change-Id: I36c5e1e0ed9a9032e7f5d3653b413ad1911c37a5
 2018-11-19 15:13:32 +01:00
Mrozek, Michal
c0f6af1df3 Use maxOsContextCount to initialize trimCandidateList for WDDM allocations. 
Change-Id: Icc65d19ed45bb1aa1a3dba4de536cf85ab9b906b
 2018-11-19 11:24:16 +01:00
Dunajski, Bartosz
ac15e7f3ac Unify expectMemory in Aubs and introduce expectMemoryNotEqual 
Change-Id: Ifd52f2d3ad3badf6ea9dac2c2b9873a40efa8482
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-19 10:39:45 +01:00
Kai Chen
85b60dff0f Linux GPU address allocator for devices with reduced address space 
Code implementation of GPU address allocator for devices with reduced
address space.

Change-Id: Ieb0412c5930fdd71f90741055cf89c0338b01133
Signed-off-by: Kai Chen <kai.chen@intel.com>
 2018-11-19 10:20:25 +01:00
Mateusz Jablonski
66492a53a4 Change type of residency task count to uint32_t 
Move definitions of objectNotUsed and objectNotResident to GraphicsAllocation

Change-Id: I2aec604a865cc6c975e9d1121028cbdd35c0b18a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-16 16:04:48 +01:00
Dunajski, Bartosz
bd4ea652ec Make Timestamp allocations OneTimeAubWritable 
Change-Id: I22e973714e4df1b3a07d8fb45cdab37b28a6433e
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-16 15:49:25 +01:00
Mrozek, Michal
08424d798f Enable power saving mode for queues created with throttle hint low. 
- When queue is created with throttle hint low it should be power conservative
- With this change whenever queues with low throttle setting requests wait
for GPU completion, such wait will be handled in power conservative manner.
- Whenever GPU is not completed, waiting thread will be put to sleep and will
for GPU completion that triggers the wake up interrupt.

Change-Id: I9f34872a38ab9f5952f9d9623ea43503fc3dd587
 2018-11-16 15:20:31 +01:00
Dunajski, Bartosz
9345b25352 AUB services update 
Change-Id: I451794f78fa0379c3f5f8cd7a913f350d0decb3c
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-16 11:08:47 +01:00
Mrozek, Michal
b102f8556e Add missing makeResident call on debug surface. 
Change-Id: I9c2d1bcf608dbfc71a3859b237e249d41810c153
 2018-11-16 09:38:55 +01:00
Maciej Dziuban
969d4da811 Cleanup WddmResidencyController related code 
- Move trimCallback from WddmMemoryManager
- Refactor lastFenceValue accessors to be less generic

Change-Id: I01b31ccb81a5ecc04d07912061326428b07a59bf
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-11-16 08:34:18 +01:00
Mateusz Jablonski
0e0a280803 Create structure UsageInfo for task count and residency task count 
Change-Id: I0899c88d9e567a09ba46461ae69cf6c80f713e67
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-15 14:07:05 +01:00
Mateusz Jablonski
1a89a0103a Register trim callback after creating monitored fence 
Change-Id: Ib0510a0aed180c7bfe883a60632fd642664e1085
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-15 12:47:01 +01:00
Mrozek, Michal
5b316d142c Delete drm requirement tests. 
- Those requirements are no longer valid.

Change-Id: I8885c2591fccf8825d812128ead6a637e353009f
 2018-11-15 12:34:30 +01:00
Piotr Fusik
e66920a8f8 Fix typos. 
Change-Id: Ie7add32684f812e11281668d9b93910384086c62
 2018-11-15 12:18:03 +01:00
Dunajski, Bartosz
728932ed44 Pass Drm object to OsContext on Linux 
Change-Id: I341925eef9bc892f5c321c668736bb6a3aff38f5
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-15 12:04:03 +01:00
Piotr Fusik
76efeae9d8 Pass more information to programPipelineSelect. 
Change-Id: Iaabe60742269b721f8defe71306dd6e87d60d546
 2018-11-15 11:45:45 +01:00
Maciej Dziuban
9bdedc62dd Move residency functions to WddmResidencyController 
Change-Id: Ic73a51546b3325515f293808550376fa6b57dec3
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-11-15 11:17:27 +01:00
Mrozek, Michal
4341ad0323 Add PowerSaving debug variable. 
- It allows to easily turn ON the power saving mode for the driver.
- In that mode, whenever GPU is not ready it will put current thread to sleep,
thread is resumed when GPU completes.
- PowerSaving mode reduces CPU utilization on blocking calls, while increasing
completion latencies.

Change-Id: I3de83713687952ac31a1ec8c397f48aa4212781d
 2018-11-15 11:14:08 +01:00
Filip Hazubski
622f71a1b2 Move MemoryProperties struct to separate file 
Change-Id: Ie35d2638b6fe5cafe64f3b9fc3e0c3b67ac08fd7
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2018-11-15 08:09:16 +01:00
Milczarek, Slawomir
1a4628cd8e AUB file with information about driver version 
Change-Id: I7f8e01236962580515f36d72805d33af40d5fd2d
 2018-11-14 19:46:45 +01:00
Mrozek, Michal
3c0a6bd24d Remove residency control from Buffer Object. 
- Residency is being controlled by Graphics Allocation.
- Duplicates are now eliminated only for shared resources.

Change-Id: Ib51e2739a07728ae0b94abf6cce2e9981b017111
 2018-11-14 08:32:04 +01:00
Hoppe, Mateusz
0942edd6af Update aub_stream headers 
- pass hwInfo and localMemoryEnabled to AubCenter ctor
- initialize AubCenter in Platform:intialize() when Device is
 created - only when CSR is not CsrHw
- move aub_center files to runtime/aub directory

Change-Id: Iceb4bf1cb2bb55b42d438502cca667a449f11411
 2018-11-13 18:09:30 +01:00
Hoppe, Mateusz
12ece3a220 Reorder STATE_BASE_ADDRESS and STATE_SIP 
- STATE_SIP should be added after STATE_BASE_ADDRESS
- tests refactor.

Change-Id: I000316b70db714fb227b6174f793d4bf8806ea9a
 2018-11-13 17:57:51 +01:00
Dunajski, Bartosz
e0f782e77a Improve TimestampPacketWriteEnabled condition check 
Change-Id: I2117dbd7841e65ed87241c0b08fafe058019b690
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-13 13:40:33 +01:00
Milczarek, Slawomir
aa18a62d70 A partial unification of AUB and TBX CSR classes 
This commit moves initialization of global MMIOs from AUB CSR to Simulated CSR

Change-Id: I93a612d4f0c82e7135287f6508870190790141bc
 2018-11-10 13:12:22 -08:00
Dunajski, Bartosz
1e0064fc2f Allow ULTs to work with enabled TimestampPacketWrite 
Change-Id: Idd4622469220b859e8724d9179837c685377ce52
 2018-11-07 08:50:04 +01:00
Maciej Dziuban
b0acc5ecde Move isMemoryBudgetExhausted to WddmResidencyController 
Change-Id: Ic9da29ab954835e93cfbcd6690c1764d99939613
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-11-06 23:09:20 +01:00
Mateusz Jablonski
630a7e1c26 Allow to reuse just completed allocation 
Change-Id: I7c1ab153178b79348d49209ca09478543d35e197
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-06 22:11:24 +01:00
Woloszyn, Wojciech
549b73510c Flush L3 for reduced address space platforms 
Change-Id: I5a73e72f8e309137328930920ab174ba6f1378dc
 2018-11-06 14:26:59 +01:00
Mateusz Jablonski
815ae851b7 Graphics Allocation: store task count per context id 
Move definition of allocations list method to internal_allocation_storage.cpp

Change-Id: I4c6038df8fd1b9335e8a74edbab33b78f9293d8f
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-06 12:43:47 +01:00
Filip Hazubski
ea2e634f7e Add clCreateBufferWithPropertiesIntel() API 
Change-Id: Icfbbbc2479c1bc94008e0ccf90bcb25adddf0b61
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2018-11-06 11:03:04 +01:00