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344e92acfa1804ba6f5de241af8a8483e64dd478
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234 Commits

Author SHA1 Message Date
Mrozek, Michal
61e7ae9280 Refactor pipe control post sync programming. 
Change-Id: I81f4840345494c6d32679e29faaff786677cb4b0
 2018-11-23 11:42:32 +01:00
Mateusz Jablonski
352450adaa Pass number of os contexts to Graphics Allocation constructor 
Mark unshareable allocations

Change-Id: Ie745dc639d8c6b01e2275d29ee1fb4c6343df2bc
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-21 17:38:02 +01:00
Pawel Wilma
2f15ca0508 Add AUB registry key for additional MMIO registers list 
Change-Id: Ib478e91d8df21c48f83bfa97a4ea72c41c2f065d
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-11-21 16:41:44 +01:00
Dunajski, Bartosz
d6870a896b Reduce tag pool size to 1 for AUBs 
Change-Id: I3a3513250b10e899795e149bff2739193a725f84
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-20 11:42:32 +01:00
Venevtsev, Igor
6ea863e440 Fix Read/WriteBuffer for unaligned offsets 
Change-Id: Ia8daff3e95bd724a9f678eb471dbb44a66cc0bc7
 2018-11-20 09:25:12 +01:00
Dunajski, Bartosz
ac15e7f3ac Unify expectMemory in Aubs and introduce expectMemoryNotEqual 
Change-Id: Ifd52f2d3ad3badf6ea9dac2c2b9873a40efa8482
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-19 10:39:45 +01:00
Mateusz Jablonski
66492a53a4 Change type of residency task count to uint32_t 
Move definitions of objectNotUsed and objectNotResident to GraphicsAllocation

Change-Id: I2aec604a865cc6c975e9d1121028cbdd35c0b18a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-16 16:04:48 +01:00
Mrozek, Michal
08424d798f Enable power saving mode for queues created with throttle hint low. 
- When queue is created with throttle hint low it should be power conservative
- With this change whenever queues with low throttle setting requests wait
for GPU completion, such wait will be handled in power conservative manner.
- Whenever GPU is not completed, waiting thread will be put to sleep and will
for GPU completion that triggers the wake up interrupt.

Change-Id: I9f34872a38ab9f5952f9d9623ea43503fc3dd587
 2018-11-16 15:20:31 +01:00
Dunajski, Bartosz
9345b25352 AUB services update 
Change-Id: I451794f78fa0379c3f5f8cd7a913f350d0decb3c
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-16 11:08:47 +01:00
Mrozek, Michal
b102f8556e Add missing makeResident call on debug surface. 
Change-Id: I9c2d1bcf608dbfc71a3859b237e249d41810c153
 2018-11-16 09:38:55 +01:00
Mateusz Jablonski
0e0a280803 Create structure UsageInfo for task count and residency task count 
Change-Id: I0899c88d9e567a09ba46461ae69cf6c80f713e67
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-15 14:07:05 +01:00
Piotr Fusik
e66920a8f8 Fix typos. 
Change-Id: Ie7add32684f812e11281668d9b93910384086c62
 2018-11-15 12:18:03 +01:00
Piotr Fusik
76efeae9d8 Pass more information to programPipelineSelect. 
Change-Id: Iaabe60742269b721f8defe71306dd6e87d60d546
 2018-11-15 11:45:45 +01:00
Milczarek, Slawomir
1a4628cd8e AUB file with information about driver version 
Change-Id: I7f8e01236962580515f36d72805d33af40d5fd2d
 2018-11-14 19:46:45 +01:00
Hoppe, Mateusz
0942edd6af Update aub_stream headers 
- pass hwInfo and localMemoryEnabled to AubCenter ctor
- initialize AubCenter in Platform:intialize() when Device is
 created - only when CSR is not CsrHw
- move aub_center files to runtime/aub directory

Change-Id: Iceb4bf1cb2bb55b42d438502cca667a449f11411
 2018-11-13 18:09:30 +01:00
Hoppe, Mateusz
12ece3a220 Reorder STATE_BASE_ADDRESS and STATE_SIP 
- STATE_SIP should be added after STATE_BASE_ADDRESS
- tests refactor.

Change-Id: I000316b70db714fb227b6174f793d4bf8806ea9a
 2018-11-13 17:57:51 +01:00
Milczarek, Slawomir
aa18a62d70 A partial unification of AUB and TBX CSR classes 
This commit moves initialization of global MMIOs from AUB CSR to Simulated CSR

Change-Id: I93a612d4f0c82e7135287f6508870190790141bc
 2018-11-10 13:12:22 -08:00
Woloszyn, Wojciech
549b73510c Flush L3 for reduced address space platforms 
Change-Id: I5a73e72f8e309137328930920ab174ba6f1378dc
 2018-11-06 14:26:59 +01:00
Mateusz Jablonski
815ae851b7 Graphics Allocation: store task count per context id 
Move definition of allocations list method to internal_allocation_storage.cpp

Change-Id: I4c6038df8fd1b9335e8a74edbab33b78f9293d8f
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-06 12:43:47 +01:00
Zdanowicz, Zbigniew
ce75767ca3 Add AUB registry key to override MMIO offset value 
Change-Id: Iac3bf9074e544a03e38fc437d7b21ea478d9cc5d
 2018-11-03 00:33:50 +01:00
Hoppe, Mateusz
e6b93941ee Add aub_stream headers 
Change-Id: I4d9420210e2a06d8a36abc0cf272901514ff3547
 2018-11-02 14:29:45 +01:00
Mrozek, Michal
7ece16ee7a Graphics Allocation cleanup. 
- remove one constructor
- start using mock graphics allocation in tests

Change-Id: Idb8f4a35dbc2cae8d6bf667bab5542d8e91d6e0d
 2018-10-31 11:54:24 +01:00
Milczarek, Slawomir
4a8f4aa47b Add hash function for AUB dump handle 
Change-Id: I3f53f187a31ca47e7cf2717f328c216469171f90
 2018-10-30 19:54:36 -07:00
Milczarek, Slawomir
b051528258 Add getter for handle to AUB dump allocations 
Change-Id: I30251145775e9d81e307c983236bd2cc0568a74d
 2018-10-30 12:06:17 -07:00
Mateusz Jablonski
ead2e2ea6d Move createAllocationForHostPtr method to command stream receiver 
Remove not needed includes from command_queue.h

Change-Id: I45963bf005471bd7716d55471474299a15e27b62
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-30 17:49:08 +01:00
Mateusz Jablonski
d3f71cfb04 Move allocation lists to internal allocation storage 
Change-Id: I543f1551c8fb161cf99c5870de44afec390415b2
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-30 13:49:31 +01:00
Mateusz Jablonski
a30c70d84b Remove cleaning allocation lists methods from memory manager 
Change-Id: I4a58a5373e7dc4cf8dc5d90390e84c4f23689139
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-29 10:35:03 +01:00
Milczarek, Slawomir
7b1d19eaec Moved header with engine node definitions 
Change-Id: Iaa78bb0584589e354b1bb469b729844121decb8f
 2018-10-27 14:51:02 -07:00
Mateusz Jablonski
baa9ce74a7 Remove obtainReusableAllocation method from memory manager 
Change-Id: I629044d109822f02cfddc6418f025010e62ab65b
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-26 09:06:20 +00:00
Mateusz Jablonski
d5c9816428 Remove store allocation methods from memory manager 
Move setGPUAddress method to WddmAllocation

Change-Id: I91d877c3791e9eff69276e4258e3ce9c3111ca45
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-26 10:53:43 +02:00
Mrozek, Michal
56d10d7fb9 Enhance AUB comments. 
Change-Id: I1ff53c9f60950cfe34706153578e86f8d36fc941
 2018-10-25 17:58:44 +02:00
Milczarek, Slawomir
cd8f08b94b AUB CSR functions to operate on engine instance 
Change-Id: I928cf5f7c25980fdfb2da825cbe062b5497c328a
 2018-10-24 16:33:11 -07:00
Mateusz Jablonski
a531751001 Remove ULT code from runtime 
Change-Id: I2faf52070f980d031788fc6946df8534d96c639b
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-24 17:45:08 +02:00
Milczarek, Slawomir
9be4850213 AUB capture with a capability to get engine instance 
Change-Id: I52c47505476053d6e692fc9d89cca25a6e122a63
 2018-10-23 11:58:13 +02:00
Mateusz Jablonski
7bd92190d9 Create class to operate on command stream receiver's allocation lists 
Change-Id: I4262f46aa31948ed70d1152d172619b5619a2333
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-23 09:42:31 +02:00
Mateusz Jablonski
3bd8d71f0a Don't call command stream receiver's cleanupResources twice 
Change-Id: I9cce3eacbb805770658be91c55e1fa69dc4bae5d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-19 15:31:01 +02:00
Dunajski, Bartosz
ef65e6433e Improve EnableTimestampPacket debug variable usage 
Change-Id: I864f0dc756a7fe17a08d1bcca2d91e9b78fb730a
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-10-18 14:25:46 +02:00
Dunajski, Bartosz
6d610983f1 Deferred Pipe Control programming and CSR flush on Barrier request 
Change-Id: Iabae0f9159bb455518cedf7da068c7d3da72b840
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-10-17 09:31:34 +02:00
Mateusz Jablonski
4f028d13a1 Command stream receiver: use memory manager from execution environment 
Change-Id: I236218a73bd7dac6e5744e3596f146b77b5ca1c8
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-16 12:14:55 +02:00
Piotr Fusik
7543c1fb2a Flush AUB before HW or TBX. 
Change-Id: Ia997c6c05b2a1cb5c1968113b94ca66fbf1efe89
 2018-10-13 10:52:19 +02:00
Mateusz Jablonski
8a9d0a81df Move temporary and reusable allocation lists to command stream receiver 
Change-Id: I40df6fe39b367e243e3710c5fdeaab3c85198d9d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-11 15:32:12 +02:00
Dunajski, Bartosz
66427f60c6 Handle TimestampPackets for non-kernel enqueues 
Change-Id: I52ec4f43b10bf6e2a10b2455d32a90a606645d29
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-10-10 04:21:30 +02:00
Pawel Wilma
a05f832f80 Fix for batch buffer flattening 
Change-Id: Ib13ec6573b985cf03876bd7e37a31606b230a790
 2018-10-09 12:28:40 +02:00
Maciej Dziuban
130a7ac8b8 Delete TypeSelector helper 
Change-Id: Iff5fe62d31fa7b07658cfcf81ebd2c12d47e2b3b
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-10-08 13:18:36 +02:00
Hoppe, Mateusz
2f7158e035 Move createPhysicalAllocator() to a common CSR class 
- AUB and TBX use this method and it was duplicated,
- moving to common base class allows to remove duplicates

Change-Id: Ia9f08dfb0967de1b5968ac0e531733c5b868e504
 2018-10-08 11:38:57 +02:00
Dunajski, Bartosz
73b2e947a5 Multiple TimestampPackets handling 
Change-Id: Ia5936c3d0a34b892aa4444026a5aebc681f126c2
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-10-05 01:54:35 +02:00
Maciej Dziuban
bc4700a193 Add OsContext argument to MemoryManager::makeNonResidentEvictionAllocations 
OsContext has to propagate through following calls first:
- WddmCommandStreamReceiver<GfxFamily>::processEviction
- CommandStreamReceiver::makeSurfacePackNonResident

Change-Id: I7559c7406b2860c51905c9961cec251fac231b08
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-10-05 01:28:31 +02:00
Koska, Andrzej
2110ba6ca4 Passing correct taskCount to waitForTaskCountAndCleanAllocationList 
Change-Id: Ib0d2474bcd5827f8030331f7ef45ffc2805b955b
 2018-10-04 23:53:43 +02:00
Milczarek, Slawomir
61000c0dd4 CSR AUB + HW mode - flush to poll MMIO for completion 
Ensures that each submit of LRCA be serialized through the simulator
like it is for AUBs captured in the standalone mode.

Change-Id: I1e3ad500012dce960d0e64b56af1cb60142772da
 2018-10-04 10:32:08 +02:00
Mateusz Jablonski
b602cd2bb8 Pass execution environment to memory manager 
Change-Id: If43cf9d1353b4cbc02ea269fb9105c01cc4e0876
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-03 22:12:26 +02:00