Dominik Dabek
c5c87ab6f9
fix: override for driver protection bits
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Add product helper method, default no override.
Use single param. Usage unknown means no override.
Related-To: NEO-14482
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com >
2025-05-19 12:36:23 +02:00
John Falkowski
468c62086e
refactor: Gate shared system mem caps with KMD cap
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If KMD not capable then set sharedSystemAllocCapabilities=0
Related-To: NEO-12988
Signed-off-by: John Falkowski <john.falkowski@intel.com >
2025-05-19 11:08:19 +02:00
Mateusz Hoppe
b03f625f03
feature: limit max LWS based on preferred number of workgroups per ss
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- limit max LWS size when SLM and barriers are not used
Related-To: GSD-11112
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2025-05-16 20:28:00 +02:00
Lukasz Jobczyk
df2c776aab
refactor: Remove unused cmdq round robin engine assign
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-05-09 11:03:57 +02:00
Lukasz Jobczyk
1d1414febc
refactor: remove unused dc flush mitigation
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-05-09 08:26:26 +02:00
Szymon Morek
6ae43123f6
fix: correct usages of ULLS-related resources
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Related-To: NEO-14360
Current gmm usage type of these resources is causing
them to be cached, which is incorrect.
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-05-08 12:12:45 +02:00
Compute-Runtime-Validation
7167f45199
Revert "refactor: Gate shared system mem caps with KMD cap"
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This reverts commit 8e59ac7576 .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-05-08 11:26:52 +02:00
John Falkowski
8e59ac7576
refactor: Gate shared system mem caps with KMD cap
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Enabled only by setting EnableSharedSystemUsmSupport=1 flag
Related-To: NEO-12988
Signed-off-by: John Falkowski <john.falkowski@intel.com >
2025-05-07 06:38:01 +02:00
Compute-Runtime-Validation
d477935ab9
Revert "refactor: Gate shared system mem caps with KMD cap"
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This reverts commit f38fae3b18 .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-05-06 12:43:16 +02:00
John Falkowski
f38fae3b18
refactor: Gate shared system mem caps with KMD cap
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Related-To: NEO-12988
Signed-off-by: John Falkowski <john.falkowski@intel.com >
2025-05-06 07:28:59 +02:00
Young Jin Yoon
9d47247ef0
refactor: add product helper for blit properties
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Created a new function in ProductHelper to determine whether the
additional blit properties can be used.
Related-To: NEO-13003
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com >
2025-05-01 18:05:48 +02:00
Compute-Runtime-Validation
0c3b765942
Revert "refactor: add BlitSyncPropertiesExt to BlitSyncProperties"
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This reverts commit b5a259aded .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-05-01 03:23:53 +02:00
Young Jin Yoon
b5a259aded
refactor: add BlitSyncPropertiesExt to BlitSyncProperties
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Added BlitSyncPropertiesExt to provide additional information for
different platform and/or blitter commands.
Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com >
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com >
2025-04-30 19:11:34 +02:00
Slawomir Milczarek
cb4443a545
refactor: Add a new getter to product helper
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Related-To: NEO-12952
Signed-off-by: Slawomir Milczarek <slawomir.milczarek@intel.com >
2025-04-29 13:02:16 +02:00
Mateusz Hoppe
41efee1e7c
feature: add mode to expose single root device
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- simplify API to expose and use only single root device. Disallow
returning subdevices. This is experimental mode.
Related-To: NEO-14559
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2025-04-25 13:20:56 +02:00
Szymon Morek
3596522637
refactor: remove unused logic in ULLS controller
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Related-To: NEO-13843
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-04-17 18:35:20 +02:00
Fabian Zwoliński
ee769f5983
fix: Add texture cache flush after kernels writing to images on imm cmdlists
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- add `hasImageWriteArg` flag to KernelDescriptor,
based on image access qualifier
- add `isPostImageWriteFlushRequired` method to productHelper,
to require cache flush only on selected platforms
- if possible, add the `textureCacheInvalidationEnable` arg to the
existing PC, otherwise add a new PC
Related-To: NEO-13427, HSD-18041321008
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com >
2025-04-17 16:04:31 +02:00
Lukasz Jobczyk
d9a40734ae
performance: Remove global fence from CW post sync on BMG
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Related-To: NEO-14642
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-04-17 10:23:40 +02:00
Jaroslaw Warchulski
df07897144
fix: forbid compression for pre-xe2 platforms
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Related-To: NEO-9465
Signed-off-by: Jaroslaw Warchulski <jaroslaw.warchulski@intel.com >
2025-04-05 00:15:16 +02:00
Jaroslaw Warchulski
c010d17842
fix: respect compression flag in capability table
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Related-To: NEO-9465
Signed-off-by: Jaroslaw Warchulski <jaroslaw.warchulski@intel.com >
2025-04-03 15:36:55 +02:00
Jaroslaw Warchulski
62baf28316
fix: remove unnecesarry WA for DG2 compression
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Related-To: NEO-9465
Signed-off-by: Jaroslaw Warchulski <jaroslaw.warchulski@intel.com >
2025-04-03 08:04:19 +02:00
Aravind Gopalakrishnan
3a7d7e022c
fix: Add platform support for reservation on svm heap
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Related-To: GSD-10816
Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com >
2025-04-02 02:46:30 +02:00
Jaroslaw Warchulski
eeeed9edd8
refactor: cleanup in product helpers
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Related-To: NEO-12681
Signed-off-by: Jaroslaw Warchulski <jaroslaw.warchulski@intel.com >
2025-03-25 21:07:55 +01:00
Szymon Morek
bb10290828
fix: make misaligned user memory 2-Way coherent
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Related-To: NEO-9004
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-03-21 17:56:37 +01:00
Aravind Gopalakrishnan
724ba20e41
fix: Parse CCS mode setting for non PVC platforms
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Related-To: GSD-8785
Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com >
2025-03-19 12:47:46 +01:00
Kamil Kopryk
2e729bcb4c
refactor: move isTimestampWaitSupportedForQueues to productHelper
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Related-to: NEO-13163
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2025-03-19 09:31:33 +01:00
Compute-Runtime-Validation
d54b74e8bd
Revert "fix: Parse CCS mode setting for non PVC platforms"
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This reverts commit 5ca78dfdd1 .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-03-17 00:30:44 +01:00
Aravind Gopalakrishnan
5ca78dfdd1
fix: Parse CCS mode setting for non PVC platforms
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Related-To: GSD-8785
Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com >
2025-03-15 01:39:51 +01:00
Compute-Runtime-Validation
0d5baa2c30
Revert "performance: Cache timestamps on CPU"
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This reverts commit 83637404bf .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-03-12 04:41:46 +01:00
Katarzyna Cencelewska
4890150e12
feature: add method adjustMaxThreadsPerThreadGroup to product helper
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Related-To: HSD-18028334016, HSD-14022274275
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com >
2025-03-11 15:47:57 +01:00
Lukasz Jobczyk
83637404bf
performance: Cache timestamps on CPU
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-03-11 13:40:18 +01:00
Jaroslaw Warchulski
413194bd2a
Revert "fix: do not prefer image compression on xe_lpg for linux and WSL"
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This reverts commit 8814b6ac4f .
Resolves: NEO-14286
Signed-off-by: Jaroslaw Warchulski <jaroslaw.warchulski@intel.com >
2025-03-07 11:38:46 +01:00
Szymon Morek
82fba79d9d
performance: set 1ms timeout for ulls controller on LNL and PTL
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Related-To: NEO-13843
Limit scope to Windows only.
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-03-06 09:13:58 +01:00
Kamil Kopryk
4c795027e3
refactor: add check if event L3 flush is needed
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2025-03-05 18:25:29 +01:00
Jaroslaw Warchulski
8814b6ac4f
fix: do not prefer image compression on xe_lpg for linux and WSL
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Related-To: HSD-18034872015
Signed-off-by: Jaroslaw Warchulski <jaroslaw.warchulski@intel.com >
2025-02-28 14:20:57 +01:00
Kamil Kopryk
c2387954e9
fix: disable 3d and media sharing support on PVC
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Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2025-02-14 17:37:05 +01:00
Brandon Yates
635f69e54a
fix: Configure scratch pages for debugger
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DG2 requires scratch pages on for debugger. Other platforms do not.
Related-to: NEO-13883
Signed-off-by: Brandon Yates <brandon.yates@intel.com >
2025-01-31 06:49:49 +01:00
Fabian Zwoliński
7918b44a94
fix: apply 2MB alignment to large local memory allocations
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In this patch, we align up the allocation size to 2MB for all
allocations >= 2MB located in local memory.
2MB alignment support is defined by function:
`is2MBLocalMemAlignmentEnabled`
Related-To: NEO-12287
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com >
2025-01-30 22:09:39 +01:00
Compute-Runtime-Validation
768e15bab2
Revert "performance: reduce ULLS controller timeout to 1ms"
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This reverts commit 0db7128503 .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-01-30 03:41:58 +01:00
Maciej Bielski
a8779c2387
fix: report ZE_MEMORY_ACCESS_CAP_FLAG_CONCURRENT correctly
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At the moment the capability is returned only based on the value
returned by the `productHelper`, which is too liberal. The capability
must also consider the support reported by `memoryManager`. Only then
the support reported is aligned with actual logic of handling
USM-allocations.
Related-To: NEO-10040
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com >
2025-01-29 00:17:38 +01:00
Szymon Morek
0db7128503
performance: reduce ULLS controller timeout to 1ms
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Currently scope limited to Windows only
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-01-28 22:27:09 +01:00
Mateusz Hoppe
e00da808cb
feature: add logic to control secondaryContextsSupport in ProductHelper
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- product helper sets flag in GfxCoreHelper - this allows to control
secondary contexts support per product - not whole core family
Related-To: NEO-13789
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2025-01-25 06:43:56 +01:00
Lukasz Jobczyk
c0838e1f76
fix: Apply dispatch all for small TG only on BMG
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-01-22 13:04:44 +01:00
Mateusz Jablonski
112abeeeef
fix: don't adjust programmed per thread scratch size
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when adjusting scratch space size then adjust only allocation size
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2025-01-10 11:35:50 +01:00
Mateusz Jablonski
a3b6c1fa6d
fix: correct thread/eu ratio for scratch to Xe2
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2025-01-09 22:42:36 +01:00
Dominik Dabek
8d4721d613
performance: update igc indirect detection version
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Update required indirect detection versions to 9 for pvc vector compiler
and non-pvc non-vector compiler.
Related-To: NEO-12491
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com >
2025-01-07 13:25:12 +01:00
Damian Tomczak
98331e7d63
feature: is48bResourceNeededForRayTracing specialization for rt encoder
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Related-to: NEO-10074
Signed-off-by: Damian Tomczak <damian.tomczak@intel.com >
2024-12-12 13:29:07 +01:00
Dominik Dabek
894c74b62d
fix: disable indirects detection on non-PVC
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Also add ULTs for getting indirect detection version product helper
methods.
Related-To: GSD-10453
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com >
2024-12-09 15:11:30 +01:00
Dominik Dabek
99a353a15a
feature: flags for logging indirect detection
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Add flag to log information for indirect detection debugging.
Add flag to disable indirect detection by kernel name.
Add flag to force indirect detection enable/disable for CM kernels.
Related-To: NEO-13372
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com >
2024-11-29 16:37:47 +01:00
Filip Hazubski
8797c326b6
refactor: Move isDummyBlitWaRequired function to release helper
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Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2024-11-15 13:22:00 +01:00