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356 Commits

Author SHA1 Message Date
Compute-Runtime-Validation
3dd6e3f125 Revert "Enable Symbol Table Generation by Default for L0 modules" 
This reverts commit c2e3d24a1d.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-06-15 10:28:47 +02:00
Compute-Runtime-Validation
930db249ff Revert "Enable Global Symbol Generation by Default for L0 modules" 
This reverts commit 9996228281.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-06-15 08:45:53 +02:00
Neil R Spruit
9996228281 Enable Global Symbol Generation by Default for L0 modules 
Signed-off-by: Neil R Spruit <neil.r.spruit@intel.com>
 2022-06-14 22:36:08 +02:00
Neil R Spruit
c2e3d24a1d Enable Symbol Table Generation by Default for L0 modules 
- Added EnableProgramSymbolTableGeneration to enable or disable default
behavior for IGC to generate the program symbol tables for L0 modules
with exported functions.
- Default value set to true to add -library-compilation to all module
builds.

Signed-off-by: Neil R Spruit <neil.r.spruit@intel.com>
 2022-06-14 18:10:24 +02:00
Jaime Arteaga
d5bc7e66e7 Enable ZE_ENABLE_PCI_ID_DEVICE_ORDER by default 
Most customers use this already, so enable by default to have
consistent enumeration of devices.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2022-06-13 21:31:36 +02:00
Dominik Dabek
cdfe2ce8ad Feature: Flag for device usm allocation reusing 
With flag enabled, when app calls freeSVMAlloc on device usm allocation,
don't free it immediately but save it,
and try to use it on subsequent allocations.

This allocation cache will be trimmed if an allocation fails.

Related-To: NEO-6893

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-06-13 20:02:52 +02:00
Lukasz Jobczyk
24ff26c396 Allocate new ring buffer if all are in use 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-06-10 12:45:49 +02:00
Daniel Chabrowski
d3414153d4 Fix typos in debug variables 
Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com>
 2022-06-02 18:41:11 +02:00
Naklicki, Mateusz
58ec879c46 Add support for gem create extension to create VM_PRIVATE BOs 
Add support for PRELIM_I915_GEM_CREATE_EXT_VM_PRIVATE extension
to create VM_PRIVATE BOs.

Related-to: NEO-6730
Signed-off-by: Naklicki, Mateusz <mateusz.naklicki@intel.com>
 2022-05-31 15:18:33 +02:00
Filip Hazubski
35d1f2e341 Add debug flag to control programming of thread arbitration policy with SCM 
Related-To: NEO-6801

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-05-27 11:35:41 +02:00
Daniel Chabrowski
6fd7ae7142 Cleanup headers 
Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com>
 2022-05-26 17:55:44 +02:00
Cetnerowski, Adam
1c97668083 Minor: Debug key descriptions cleanup 
Relates-to: NEO-6968

Signed-off-by: Cetnerowski, Adam <adam.cetnerowski@intel.com>
 2022-05-26 08:43:22 +02:00
Lukasz Jobczyk
921f76eea0 Calculate timeout using CCSes count 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-05-25 11:44:11 +02:00
Michal Mrozek
b934a3f5cb Revert "Enable ZE_ENABLE_PCI_ID_DEVICE_ORDER by default" 
This reverts commit 4fb776b6d5eac2ea3b3ee1becde937f189bb02b9.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2022-05-23 15:17:33 +02:00
Lukasz Jobczyk
13f8139951 Change direct submission controller unit to microseconds 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-05-23 08:34:49 +02:00
Jaime Arteaga
075e192ac2 Enable ZE_ENABLE_PCI_ID_DEVICE_ORDER by default 
Most customers use this already, so enable by default to have
consistent enumeration of devices.

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2022-05-20 18:02:10 +02:00
Pawel Wilma
d9858bf206 Add debug variable to override device name 
This commit introduces debug variable to override device name reported
by CL_DEVICE_NAME property in OpenCL and ze_device_properties_t.name in
level_zero

Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2022-05-19 15:16:13 +02:00
Bartosz Dunajski
56a164ffcd Debug mask support to force uncached Gmm usage type 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-05-18 19:23:34 +02:00
Daniel Chabrowski
7463e1970b Cleanup headers 
Make TUs and headers self-contained, remove unused headers

Signed-off-by: Daniel Chabrowski <daniel.chabrowski@intel.com>
 2022-05-18 11:42:06 +02:00
Artur Harasimiuk
3f04769f07 style: configure readability-identifier-naming.FunctionCase 
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2022-05-17 20:55:56 +02:00
Kamil Kopryk
99db73c034 Add debug flag to fail build program with stateful access 
I've added debug flag FailBuildProgramWithStatefulAccess which makes
possible to fail build program/module creation
with stateful access(except builtins) on
pvc and later platforms.

Related-To: NEO-6075
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-05-17 11:01:05 +02:00
Lukasz Jobczyk
be908f4695 Update ReturnSubDevicesAsApiDevices debug variable description 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-05-12 10:42:28 +02:00
Kamil Kopryk
fb4b1cca4f Use internal blitter for internal memory transfers 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-6621
 2022-05-11 19:33:00 +02:00
Lukasz Jobczyk
a31a674c38 L0 support for expose sub devices as API devices 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-05-11 15:41:53 +02:00
Mateusz Hoppe
c021e2ec5e L0 Debugger - DebugSession linux implementation 
- new feature, enabled with PRELIM build
- implementation of debug session for linux
- move ResourceClass enum from Drm to drm_debug.h

Resolves: NEO-6814


Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2022-05-11 15:30:32 +02:00
Artur Harasimiuk
e9be9b64c6 clang-tidy configuration cleanup 
Define single .clang-tidy configuration with all used checks and use
NOLINT to selectively silence tool. That way cleanup should be easier.
third_part/ has its own configuration that disables clang-tidy for this
folder.

Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2022-05-11 14:02:04 +02:00
Bartosz Dunajski
c4fcd7ed9b Capability to set low scheduling priority for Wddm context 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-05-10 16:44:25 +02:00
Lukasz Jobczyk
17aac9d1bf Add debug flag to expose each subdevice as a separate cl device 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-05-10 14:04:26 +02:00
Filip Hazubski
3413039a69 Add debug variable to control whether large grf should be programmed with SCM 
Add debug variable ForceGrfNumProgrammingWithScm.
Do not update large grf value in StreamProperties when unnecessary.

Related-To: NEO-6659

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-05-06 15:45:46 +02:00
Dominik Dabek
6e8cabdce5 Split wait for timestamps to queue and event 
On PVC both enabled.
On DG2 only for events.

Related-To: NEO-6948

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2022-05-06 15:34:47 +02:00
Lukasz Jobczyk
82d1962aba Assign BCS at first blit enqueue 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-05-04 17:11:34 +02:00
Compute-Runtime-Validation
a3fe50c2e4 Revert "Assign BCS at first blit enqueue" 
This reverts commit 0469034acb.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-05-04 13:33:25 +02:00
Lukasz Jobczyk
0469034acb Assign BCS at first blit enqueue 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-05-04 10:19:05 +02:00
Lukasz Jobczyk
73d3d83e60 Assign gpgpu engine at first enqueue 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-04-29 11:33:12 +02:00
Compute-Runtime-Validation
e8e3355a93 Revert "Assign BCS at first blit enqueue" 
This reverts commit 5f5a1a6f81.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-04-26 09:40:46 +02:00
Lukasz Jobczyk
5f5a1a6f81 Assign BCS at first blit enqueue 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-04-25 13:48:21 +02:00
Zbigniew Zdanowicz
dc4a1e7cd5 Add debug flag to select event field for event completion 
Related-To: NEO-6871

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-04-21 12:15:43 +02:00
Filip Hazubski
d2462ff8fb Add debug flag to control ISA allocation padding 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-04-04 15:12:30 +02:00
Bartosz Dunajski
779bca39a7 Debug flag to add sfence instruction prior to DirectSubmission dispatch 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-04-01 15:53:03 +02:00
Mateusz Hoppe
beff0019d1 SBA tracking for single address space 
Related-To: NEO-6539


Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2022-04-01 15:24:11 +02:00
Bartosz Dunajski
08e3853982 Debug flag to add extra MI_MEM_FENCE for DirectSubmission 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-03-30 16:07:25 +02:00
Rafal Maziejuk
c7d8915dd4 Add debug variable to print XY_BLOCK_COPY_BLT command details 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2022-03-29 18:15:13 +02:00
Bartosz Dunajski
68351249d1 Add debug flag to read back command buffer pointer 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-03-29 13:08:18 +02:00
Mateusz Jablonski
3ac0581f2e Add debug flags to read back cmd/ring buffer before unblocking semaphore 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-03-25 20:36:29 +01:00
Bartosz Dunajski
be50afb930 Add and enable Direct Submission ring switch tag update WA 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-03-25 12:26:29 +01:00
Mateusz Jablonski
8a8b4866cb XeHPC: force local memory for command/ring/semaphore buffer 
require 48bit resource for ring/semaphore buffer
for multi tile allocations select first tile
for single tile allocation select preferred tile

Related-To: NEO-6698
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-03-24 10:54:26 +01:00
Daniel Chabrowski
28b867f883 Move and extend local memory DRM allocations 
Signed-off-by: Daniel Chabrowski daniel.chabrowski@intel.com
Related-To: NEO-6591
 2022-03-22 13:47:05 +01:00
Mateusz Jablonski
3792481d33 XeHPC Implicit scaling: put command/ring/semaphore buffer to first memory bank 
In direct submission scenario command/ring/semaphore buffer allocations
are placed in the same memory bank to ensure that their memory is updated in
correct order

Related-To: NEO-6698
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-03-21 08:10:50 +01:00
Lukasz Jobczyk
f8449fb216 Add round robin engine assign controls 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-03-14 10:57:20 +01:00
Bartosz Dunajski
79fedd59e4 Add BB_START prepatching WA - disabled by default 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-03-10 17:05:53 +01:00