Commit Graph

1047 Commits

Author SHA1 Message Date
Michal Mrozek
3d9548cee9 [5/n] Optimize Indirect Allocations.
Enable mechanism where feasible.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-01-26 16:01:10 +01:00
Igor Venevtsev
af7a475cb0 Fix debug zebin creation
- ELF type is EXEC
- Absolute GPU addresses in program headers as load addresses
- All relocations are applied (not only for debug info as before)
- Default section alignment for debug zebin is set to 4,
this fix the problem with .notes section parsing

Related-To: NEO-5571
Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
2022-01-26 13:55:32 +01:00
Dominik Dabek
63f406a58c Check IndirectStatelessCount from igc
If kernel has no stateless indirect accesses don't set the
kernelHasIndirectAccess flag.
Don't make resident or migrate if kernel has no indirect accesses.
Changed initial values in KernelAttributes.

Related-To: NEO-6597

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-01-26 11:10:04 +01:00
Compute-Runtime-Validation
15b9ec57d1 Revert "Enable Flush task by default for immediate commandlist"
This reverts commit 22bbce42dd.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-01-26 04:53:03 +01:00
Jaime Arteaga
dbf0f90186 Return pageSize in getMemAllocProperties
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2022-01-25 18:26:13 +01:00
Michal Mrozek
6df17f5a30 [3/n] Optimize indirect allocations handling.
Add new debug variable to trigger new mode.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-01-25 16:40:56 +01:00
Michal Mrozek
a12f9cb377 [2/n] Optimize indirect calls.
Migrate shared allocation when command list sets indirect flags.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-01-25 13:10:53 +01:00
Aravind Gopalakrishnan
22bbce42dd Enable Flush task by default for immediate commandlist
Related-To: LOCI-1988

Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
2022-01-25 01:12:30 +01:00
Mateusz Jablonski
0c933d83af Update RENDER_SURFACE_STATE for Xe Hpc
For Xe Hp and later rename RSS tile mode enum from YMAJOR to TILE4

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-24 18:06:42 +01:00
Jaime Arteaga
c54633388d Release support for L0 v1.3
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2022-01-24 15:12:33 +01:00
Compute-Runtime-Validation
1634ac9ec3 Revert "Dont generate gen file by default"
This reverts commit 95943dee0f.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-01-24 14:46:29 +01:00
Michal Mrozek
151aaf7678 Fix alignment for host allocations.
- it is 4k not 64k.

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2022-01-24 13:24:03 +01:00
Mateusz Hoppe
ad7f2f1f6e Notify kernel loads after copying fully linked ISA
- notify through make resident call

Related-To: NEO-6556

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2022-01-21 14:28:22 +01:00
Maciej Plewka
6968bfdb33 Use correct enum values for sampler in clamp mode
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-01-20 18:15:53 +01:00
Fabian Zwolinski
d9bf1886c2 Remove GMock from GMockMemoryManagerFailFirstAllocation, GMockMemoryManager...
Removed GMock from
- GMockMemoryManagerFailFirstAllocation
- GMockMemoryManager
- TestEventCsr
- MockKmdNotifyCsr
- MockMemoryOperationsHandlerTests
- GmockGmmMemory
- MockMemoryManagerCommandQueueSBA
- TestCmdQueueCsr

Renamed:
- GMockMemoryManagerFailFirstAllocation -> MockMemoryManagerFailFirstAllocation

Moved class body:
- GMockMemoryManager to MockMemoryManager
- GmockGmmMemory to MockGmmMemoryBase

Related-To: NEO-4914
Signed-off-by: Fabian Zwolinski <fabian.zwolinski@intel.com>
2022-01-20 16:08:34 +01:00
Zbigniew Zdanowicz
8aaa927869 Return default context for multi-tile device in low-priority queue
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-20 14:48:11 +01:00
Compute-Runtime-Validation
6082865eb4 Revert "Optimize Level Zero indirect allocations handling."
This reverts commit 3ecbc55ba9.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-01-20 11:41:13 +01:00
Zbigniew Zdanowicz
d3d803cdb0 Enable Implicit Scaling on Level Zero
* This commits enables by default implicit scaling, but only on PVC B step
* Users can disable this feature by debug flag EnableImplicitScaling=0|

Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-19 19:13:43 +01:00
Michal Mrozek
3ecbc55ba9 Optimize Level Zero indirect allocations handling.
Make them resident directly instead of populating residency container
Remove finds, not needed, CSR resolves duplicates at makeResident calls
Observed gain is 32x for 10k indirect allocations.


Co-authored-by: Michal Mrozek <michal.mrozek@intel.com>

Co-authored-by: Dominik Dabek <dominik.dabek@intel.com>

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-01-19 13:08:35 +01:00
Mateusz Jablonski
8ebef3769c Update RENDER_SURFACE_STATE for Xe Hpg
Program Multi Gpu params in surface state only on Xe Hp Sdv
Respect zero-size image scenario when programming surface state
Move XeHp-only tests to dedicated subdir

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-18 21:06:14 +01:00
Zbigniew Zdanowicz
4238679078 Refactor implicit scaling device support
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-18 13:08:43 +01:00
Kamil Kopryk
40483acd17 Improve blitter programming
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-01-18 10:36:05 +01:00
Mateusz Borzyszkowski
95943dee0f Dont generate gen file by default
Ocloc can dump gen file when we add -gen_file flag to cmd.
Otherwise gen is not generated

Signed-off-by: Mateusz Borzyszkowski <mateusz.borzyszkowski@intel.com>
2022-01-17 18:14:50 +01:00
Zbigniew Zdanowicz
625575209a Add new test matcher
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-17 16:13:45 +01:00
Mateusz Jablonski
e5a18177c5 Add unit test helper function to set pipe control hdc flush
Separate unit test helper definitions bdw_and_later / xe_hp_and_later

Related-To: NEO-6466

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-01-17 15:45:29 +01:00
Zbigniew Zdanowicz
c36c083812 Refactor implicit scaling parameters for surface state
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-17 09:30:58 +01:00
Zbigniew Zdanowicz
b78bb26cbf Refactor partitioning of state base address
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-14 19:06:24 +01:00
Zbigniew Zdanowicz
504b49effa Add new unit test to command list compute barrier suite
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-14 16:15:36 +01:00
Neil R Spruit
79bf9401ef Fallback to buildFromSpirV given < 2 static link targets
Signed-off-by: Neil R Spruit <neil.r.spruit@intel.com>
2022-01-14 02:17:52 +01:00
Zbigniew Zdanowicz
9c4f05387b Refactor partitioning of dispatched kernels
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-13 22:54:07 +01:00
Compute-Runtime-Validation
182042b04d Revert "Update default thread arbitration policy"
This reverts commit 8c3e9ace69.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-01-13 21:32:29 +01:00
Bartosz Dunajski
8c3e9ace69 Update default thread arbitration policy
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2022-01-13 16:24:11 +01:00
Zbigniew Zdanowicz
9785ab7828 Refactor encode dispatch kernel class interface
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-13 12:08:38 +01:00
Igor Venevtsev
71746a2fff Register zebin binary in L0 debugger
Related-To: NEO-5571

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
2022-01-12 23:17:59 +01:00
Barigou, Youcef
5b3e20a2aa Add some missing ULTs for device_imp.cpp
Related-To: LOCI-2834

Signed-off-by: Barigou, Youcef <youcef.barigou@intel.com>
2022-01-12 23:07:52 +01:00
Raiyan Latif
394c0e90e1 Return error when failing on submission
Signed-off-by: Raiyan Latif <raiyan.latif@intel.com>
2022-01-12 16:42:30 +01:00
Jaime Arteaga
f182259a97 Return user size on zeMemGetAddressRange
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2022-01-11 23:12:23 +01:00
Rafal Maziejuk
8729521769 Use dispatchBlitCommandsForBufferRegion when copying buffers in L0
First step to separate dispatch blit commands for buffers
from dispatch blit commands for images.

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-6134
2022-01-11 13:52:56 +01:00
Compute-Runtime-Validation
b249c10e09 Revert "Add ze_eu_count_t to get total number of EUs"
This reverts commit 635c02e1ff.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-01-10 20:06:52 +01:00
Zbigniew Zdanowicz
5e626a15bf Add untyped flush to level zero barrier command
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-01-10 16:42:30 +01:00
Spruit, Neil R
02f075c541 Power Saving Hint Support for Level Zero in Windows
- Added Functionality to pass ze_power_saving_hint_type_t to zeContextCreate
included in the pNext extensions in ze_context_desc_t.
- Enables handling a hint value 0-100 with 0 being no power savings
and 100 being maximum power savings.
- ZE_RESULT_ERROR_INVALID_ENUMERATION is returned given an invalid hint.

Related-To: LOCI-2567

Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
2022-01-06 23:56:59 +01:00
Jaime Arteaga
635c02e1ff Add ze_eu_count_t to get total number of EUs
Related-To: LOCI-2667

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2022-01-06 17:38:56 +01:00
Young Jin Yoon
32ccf30c61 Add support for pci_ext_properties_t
Added API definition in ze_device.cpp, and added function declaration of
getPciProperties() in device.h and device_imp.cpp
Initially returns -1 for all values of ze_pci_speed_ext_t for now, simply
because we do not have function to retrieve the information of the PCI
speed.

Related-To: LOCI-2669
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
2022-01-05 10:43:54 +01:00
Filip Hazubski
5be4d89b73 Rename function
Rename MemorySynchronizationCommands::isDcFlushAllowed
to MemorySynchronizationCommands::getDcFlushEnable

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2021-12-30 17:03:22 +01:00
Aravind Gopalakrishnan
882ae8088f Skip L3Flush event packets during timestamp calculation
Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
2021-12-29 20:03:48 +01:00
Kopryk, Kamil
446a78a134 Force stateless addressing mode for PVC
PVC will support buffers greater than 4GB, hence we have to
use stateless accessing mode as default.

Signed-off-by: Kopryk, Kamil <kamil.kopryk@intel.com>
2021-12-29 14:53:18 +01:00
Maciej Plewka
615688336f Program all fields in SCM
Related-To: NEO-6432

This change applies WA that always programs all fields in SCM for
gen12lp. Also for those platforms Force Non-Coherent is set to 0x2.

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2021-12-28 16:30:47 +01:00
Jaime Arteaga
3b497270c8 Add support for memory free policies
Add support for ZE_DRIVER_MEMORY_FREE_POLICY_EXT_FLAG_BLOCKING_FREE
added in v1.3.

Related-To: LOCI-2672

Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2021-12-28 08:27:50 +01:00
Young Jin Yoon
c9f6460d9f Revert "Fix truncation issues from size_t to uint32_t"
This reverts commit 314d549b003a26066a3290db8d87eef59fb347f9.

This revert is to avoid errors and performance regressions on
specific platforms.

Related-To: LOCI-2558

Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
2021-12-27 19:00:58 +01:00
Maciej Plewka
df7723411f Patch image descriptor fields with dword width
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2021-12-27 17:55:42 +01:00