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306 Commits

Author SHA1 Message Date
Venevtsev, Igor
66e3f3c16c Remove OCL Events concept from command stream receiver 
Change-Id: I4d5a97b41efe601c92c2f3f33e9e24bb7d4fa3d2
 2019-02-08 15:02:40 +01:00
Chodor, Jaroslaw
6e0d04e25a Adding debug flag to disable DC flush in epilogue 
Change-Id: I1784be279ee9f837a0994997bec49c1925a68390
 2019-02-08 11:04:25 +01:00
Pawel Wilma
947794f166 Fix for setting context flags in AubDump 
Change-Id: Ia5fba17aac19fbcbfa6676557d1af0889f538b90
 2019-02-07 16:28:53 +01:00
Hoppe, Mateusz
4d9acf3352 Pass aubfile name to TbxCommandStreamReceiver::create and CSRWithAubDump 
Change-Id: Ib10c017ce4ed2a572815053dae3f517e0dfd9eb3
 2019-02-07 15:05:54 +01:00
Dunajski, Bartosz
4733ce32cf Move pollForCompletionMask for TBX to new method 
Change-Id: I1ce760ea185064ec9122eb5bf11d9b99c9c700e2
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-06 11:18:33 +01:00
Chodor, Jaroslaw
048098ce66 Refactor around cache flush after walker 
Change-Id: If5c7399df91bd076b684bcab83f50b4852e53429
 2019-02-06 11:12:55 +01:00
Maciej Dziuban
ea8aa29e12 Change pollForCompletion() insertion locations 
Poll is done on:
- Aub CSR destruction
- expectMemory
- blocking calls

Poll is not done on flush

Change-Id: I1a776a932cb608c01f0de249e7cef26b00147f31
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-02-05 14:33:42 +01:00
Mateusz Jablonski
ce4a75e121 Require same allocation type when obtaining reusable allocation 
Change-Id: I829301b83a6214bcfb4fc9f2692f21ae9a002456
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-02-01 16:10:28 +01:00
Filip Hazubski
d30cc221df Update disabling caching for a resource 
Change-Id: I00eac0add01f75a1b82d04cf42652c15b776a457
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-01 10:50:21 +01:00
Dunajski, Bartosz
32ecd91401 Add parameters to HardwareContext read call 
Change-Id: Iba70d4b90d76199df6f0bf90c95adb7dc059c715
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-02-01 10:22:15 +01:00
Milczarek, Slawomir
6ef2822643 TBX CSR to call writeMemory on aubManager 
Change-Id: Ie10a30944e0c3a8e136816fa91ff501887a3d0d2
 2019-01-31 16:18:57 +01:00
Dunajski, Bartosz
783f408f9f Dont pass EngineType or Index as parameter in Aub/Tbx CSR 
Change-Id: I4583a09a9fa5dd5b0508132c86156c91aaf24c28
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-31 10:30:05 +01:00
Dunajski, Bartosz
666d8854f8 Remove setCsrProgrammingMode() method from AUB CSR 
Change-Id: I04f86e367d919ddd5afd98e9ed07bc505306bcc7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-30 13:32:04 +01:00
Mateusz Jablonski
f157943610 Allocate internal allocations through preferred pool 
Change-Id: Ib17431ceefc1eb72f86625e0998f679baaa7cb0d
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-30 11:18:15 +01:00
Venevtsev, Igor
303014582a Extend semaphore synchronization for different command stream receivers. 
Change-Id: Ic904b8c1e052adbb7b2ef82a6dec74ec69837f9f
 2019-01-30 09:33:41 +01:00
Milczarek, Slawomir
b11e0825c9 AUB capture with support for allocation dumps 
Change-Id: I90a2b75043c33af92e4557be37cde4b9699582c6
 2019-01-28 21:20:08 +01:00
Zdanowicz, Zbigniew
72da161769 Add function to detect conditions to reset CSR 
Change-Id: I76d21eee26e22e841670180392c1b9262f6b59e1
 2019-01-28 17:00:00 +01:00
Dunajski, Bartosz
c878590162 Remove EngineInstance parameter from pollForCompletion call 
Change-Id: I07652db2de656032cdb3452239b671edbe876b75
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-28 16:49:25 +01:00
Maciej Dziuban
5c66211537 Extract mask and value for pollForCompletion in AubCsr from pollForCompletion 
Change-Id: Ice43f5d57ff7281735d002d389255abe4135feec
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-01-27 13:50:31 +01:00
Mateusz Jablonski
f332bf369e Set allocation's lock state only in lockResource and unlockResource methods 
Change-Id: I60f35801287166f5bdb0dfcd31ff0118c56ec22a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-24 15:15:27 +01:00
Milczarek, Slawomir
b2fe74ca9d AUB capture with writeMemory on aubManager 
Change-Id: Ie954b0d0f72b093f12ef33c93af5a3dc845559dc
 2019-01-23 13:54:28 +01:00
Milczarek, Slawomir
21f855b719 AubStream update (1/n) 
Change-Id: I6579e7af2015493490c5edcc413dcb2e6c804b9f
 2019-01-22 12:19:21 +01:00
Zdanowicz, Zbigniew
158f200476 Add HW commands const definitions 
Change-Id: If2e9d7f7f707b7b8c7bd8dbd3853ab3b6dad0c9a
 2019-01-18 12:13:25 +01:00
Pawel Wilma
9036882d11 Refactoring of additional MMIO registers in AubDump 
Change-Id: I97c0cc25aa24c6abcff4ba7469d6a6e3f0c12b86
 2019-01-16 11:16:54 +01:00
Zdanowicz, Zbigniew
f18f9a5f88 Use queue command buffer to program media sampler at submit 
Change-Id: I7cc410a7432564b5f15dbb6943f48b577dfa6936
 2019-01-15 15:45:44 +01:00
Dunajski, Bartosz
1de0bda212 Initialize HardwareContext with valid deviceIndex and engineIndex 
Change-Id: I8848936340e8f4b33ac5ed5d0ae85d9f580171ca
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-15 15:33:42 +01:00
Mateusz Jablonski
06600f169b Define GPGPU engines per gen 
Change-Id: Ie0e565d11184c5355b5bf09f5b10a567deb5c106
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-15 12:05:19 +01:00
Zdanowicz, Zbigniew
84d35c8951 Add media programming call at the end of command buffer 
Change-Id: Ie60bc384c9385071aa77d2516e1d3649298a1233
 2019-01-15 11:35:58 +01:00
Filip Hazubski
ec03210687 Update clEnqueueVerifyMemory 
- return success also for non aub CSRs

Change-Id: Iac7fdcd58e4b76a325ef67fd266f183d779ca956
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-14 14:37:09 +01:00
Dunajski, Bartosz
8ae7de7b0e Create HardwareContext only when osContext is available 
Change-Id: I8bcf2cb20f0e1e6b9da98b477f5be206407a7a57
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-13 15:12:07 +01:00
Dunajski, Bartosz
6ea2d8c2a9 Extract creating aub file name to separate function 
Change-Id: Ie0506f1847684cc3aabd8bee153c944b2f49bdb8
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-09 20:45:04 +01:00
Milczarek, Slawomir
ea028d2a9b Moved TBX and AUB CSR members to SimulatedCommonHw CSR 
Change-Id: I4b49b0cf886c70127a9983dd1c9d7b15f7a45b7a
 2019-01-08 09:39:28 +01:00
Mateusz Jablonski
aee69779fa Minor renaming in a scope of multi os context allocations: 
shareable -> multiOsContextCapable
resetTaskCount -> releaseUsageInOsContext
resetResidencyTaskCount -> releaseResidencyInOsContext
isUsedByContext -> isUsedByOsContext

Change-Id: If824246a0e393b962bd12f8c63d429a0fcfcda25
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-01-07 11:42:43 +01:00
Milczarek, Slawomir
9083761dce Add AUBFillBuffer test with concurrent execution on CS 
Change-Id: Ia01614a9763ff67d27ed68c46a5ae1b9f7dd0ee8
 2019-01-04 17:04:55 +01:00
Filip Hazubski
7e3884e22d Add clEnqueueVerifyMemory API 
Change-Id: I15a514b14b9efdaeb182c7abd98b8e236932d50f
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-04 08:30:02 +01:00
Venevtsev, Igor
73a63c7689 Fix Read/WriteBuffer for unaligned offsets 
Change-Id: I08d33e80243f41174f4629c8a611e286629d2e10
 2018-12-31 14:50:07 +01:00
Hoppe, Mateusz
e195b0e380 Initialize TBX stream only when hardwareContext is not created 
Change-Id: I05d8c5c395cc342ea699333dd59966913f9a98df
 2018-12-31 12:14:55 +01:00
Artur Harasimiuk
b2c1d68a91 Revert "Revert "Revert "Fix Read/WriteBuffer for unaligned offsets""" 
This reverts commit f6757c02a4.

Change-Id: I239528e7588dc9766b10a7ce7e517d6b2cdd6375
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-12-21 08:57:45 +01:00
Venevtsev, Igor
f6757c02a4 Revert "Revert "Fix Read/WriteBuffer for unaligned offsets"" 
This reverts commit 71f6524197.

Change-Id: I4f31fb6fa14fb5e3b8d8bf0a1745429bcdacd5af
 2018-12-20 14:16:07 +01:00
Milczarek, Slawomir
541ab5af50 TBX CSR with an option to create and operate on hardware context 
Change-Id: Ib5febc8e36e61195a5fcce91e1783117717ff6cb
 2018-12-20 10:59:53 +01:00
Kowalczuk, Jakub
d3ac1be3aa Replacing typedef with using in common csr 
Change-Id: Idc4e7b1b0ffe577627feac4072888080decbd41b
 2018-12-19 14:31:35 +01:00
Kowalczuk, Jakub
53fb222fe7 Unify AUB and TBX CSRs part 3 
Move:
- getCsTraits
- initEngineMMIO
- submitLRCA
to common CSR

Change-Id: I8f172b017be2e8f7c54efc8420edd2671d99a927
 2018-12-19 12:02:24 +01:00
Mateusz Jablonski
b138ff5750 Minor refactoring related to residency task count 
Change-Id: I49c9a5b37637e19fa12b7e6d91c352fb78bb117a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-19 11:38:49 +01:00
Pawel Wilma
068582445d Move physical address allocator to CommandStreamReceiverSimulatedHw 
Change-Id: Ic3c397fe1a93eccae9235f1315a26ae31a3f5b60
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-12-19 09:26:31 +01:00
Dunajski, Bartosz
403fedfb7b Improve EngineInstance usage in Aub CSR 
Change-Id: I9097f7cc8c930fcf531744af9bddfa38b2c5e1da
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-18 12:11:00 +01:00
Mateusz Jablonski
8ec072d39c Simplify Memory Manager API [3/4] 
- remove method allocateGraphicsMemory(size_t size)
- pass allocation type in allocation properties
- set allocation type in allocateGraphicsMemoryInPreferredPool

Change-Id: Ia9296d0ab2f711b7d78aff615cb56b3a246b60ec
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-17 10:42:16 +01:00
Zdunowski, Piotr
0ca8ee7f30 Additional programming for source level debugger. 
- always program STATE_BASE_ADDRESS and STATE_SIP

Change-Id: Iea6327d062b4efdddd3b0060d3105b29745b9cba
 2018-12-14 11:30:54 +01:00
Dunajski, Bartosz
010e1a4738 VFE state programming cleanup 
Change-Id: I38fb47b00211a1d28244369ac417427ada145f61
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-13 17:44:40 +01:00
Mateusz Jablonski
a6be6533ea Simplify Memory Manager API [2/n] 
- make AllocationData a protected structure
- use AllocationProperties instead of AllocationFlags
- refactor methods: allocateGraphicsMemory64kb, allocateGraphicsMemoryForSVM
- call AllocateGraphicsMemoryInPreferredPool in AllocateGraphicsMemory
  where there is no host ptr

Change-Id: Ie9ca47b1bccacd00f8486e7d1bf6fb3985e5cb12
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-11 13:12:00 +01:00
Kowalczuk, Jakub
9e53740130 Unify AUB and TBX CSRs part 2 
Move:
- getEngineIndexFromInstance
- getEngineIndex
to common CSR
Unification of arguments of some AUB/TBX methods

Change-Id: I46f25e16aa9fbad10ffc3890cc31915fa5edb1d9
 2018-12-10 12:23:27 +01:00