mraghuwa
978003e96e
Add subdevice support for RAS module
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Change-Id: Iced5aeed86d6b19a4710992155257e420ae1296f
Signed-off-by: mraghuwa <mayank.raghuwanshi@intel.com >
2020-10-27 17:54:29 +01:00
mraghuwa
a8a013b0c3
Implement zesRasGetState to retrieve cache errors
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Change-Id: I9fbba505db6551f510cb20ea71604af53db61960
Signed-off-by: mraghuwa <mayank.raghuwanshi@intel.com >
2020-10-20 15:45:36 +02:00
mraghuwa
2643346b48
Update Sysman RAS Module
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Change-Id: I2b99dae4336811ea4b539da48c1434657a9cf62a
Signed-off-by: mraghuwa <mayank.raghuwanshi@intel.com >
2020-10-09 08:23:19 +02:00
mraghuwa
220c575850
Update Ras Api's as per latest spec
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Change-Id: I29b77eee0832fcca6d989f9ef41b01b17232a91e
Signed-off-by: mraghuwa <mayank.raghuwanshi@intel.com >
2020-08-06 08:31:03 +02:00
Jaime Arteaga
902fc2f6c4
level-zero v1.0 (2/N)
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Change-Id: I1419231a721fab210e166d26a264cae04d661dcd
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com >
Signed-off-by: macabral <matias.a.cabral@intel.com >
Signed-off-by: davidoli <david.olien@intel.com >
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@intel.com >
Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com >
Signed-off-by: Latif, Raiyan <raiyan.latif@intel.com >
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com >
2020-08-03 13:11:13 +02:00
Vilvaraj, T J Vivek
0c9c55cd17
add counter support for RAS.
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- added dual handle support for RAS Correctable and Uncorrectable Errors.
- added reset counter for RAS.
- added Os Specific ULT for RAS
Change-Id: Ia10115bf6720ab211f549571e810ec0d6c0801ec
2020-06-25 08:48:11 +02:00
Vilvaraj, T J Vivek
324b1f5c60
RAS APIs boilerplate for Level Zero Sysman.
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-Implement zetSysmanRasGet API
Change-Id: Ib06e4a5d087a1e684c918413c3d98da2082e4f91
Signed-off-by: Vilvaraj, T J Vivek <t.j.vivek.vilvaraj@intel.com >
2020-04-21 20:04:53 +02:00
