Commit Graph

262 Commits

Author SHA1 Message Date
Mateusz Jablonski
4a246534ca Reduce usage of global gfx core helper getter [4/n]
Related-To: NEO-6853
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-12-15 16:58:12 +01:00
Kamil Kopryk
232b886056 Rename HwInfoConfig to ProductHelper
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-12-14 14:39:52 +01:00
Mateusz Jablonski
10dbfc0d19 Reduce usage of global gfx core helper getter [3/n]
Related-To: NEO-6853
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-12-13 11:13:11 +01:00
Kamil Kopryk
03b687881f Rename HwHelper -> GfxCoreHelper
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-12-09 10:29:06 +01:00
Slawomir Milczarek
5c1b50bccf Add memory prefetch modes for single and multiple subdevices
Single-subdevice prefetch for cmd list copy-only (with bcs) and acc mode.
Multi-subdevice prefetch (default) for shared allocation with multiple BOs.

Related-To: NEO-6740

Signed-off-by: Slawomir Milczarek <slawomir.milczarek@intel.com>
2022-12-07 15:25:32 +01:00
Warchulski, Jaroslaw
be647d42d9 Cleanup includes 12
Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2022-12-07 13:14:15 +01:00
Milczarek, Slawomir
4fd21cf59c Add memory prefetch support for cmd list copy-only
Related-To: NEO-6740

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2022-12-05 16:25:29 +01:00
Kamil Kopryk
73b2104183 Rename L0HwHelper -> L0GfxCoreHelper
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-12-05 11:26:05 +01:00
Dunajski, Bartosz
2c08f2ca8c RelaxedOrdering: Optimize return ptr programming
Related-To: NEO-7458

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-11-29 13:22:25 +01:00
Maciej Plewka
4b42b066f8 Use dedicated using type for TaskCount
Related-To: NEO-7155

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-11-28 16:44:44 +01:00
Dunajski, Bartosz
3f962bf3e8 RelaxedOrdering: Improve dependencies tracking
Avoid not needed scheduler programming
Related-To: NEO-7458

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-11-28 16:00:21 +01:00
Yates, Brandon
4bd5765a06 L0 Debug - Fix imm cmdlist mode on windows
Single Address Space SBA programming was using incorrect BB
level and not loading GPR15

Related-to: NEO-7517
Signed-off-by: Yates, Brandon <brandon.yates@intel.com>
2022-11-25 20:37:14 +01:00
Milczarek, Slawomir
4476e7ad76 Fixed conditions to remove memory prefetch allocations in L0 backend
Ensure memory prefetch be applied in every execution of command list.

Related-To: NEO-6740

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
2022-11-23 16:19:34 +01:00
Dunajski, Bartosz
bc619fcbec Queue stall mode for RelaxedOrdering
Related-To: NEO-7458

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-11-23 12:09:52 +01:00
Dunajski, Bartosz
e050d231b9 RelaxedOrdering: Add support for return pointer registers programming
Related-To: NEO-7458

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-11-23 09:58:33 +01:00
Dunajski, Bartosz
bc5d9d149d Task VA tracking for RelaxedOrdering mode
Related-To: NEO-7458

Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-11-21 17:35:08 +01:00
Kamil Kopryk
08d4e57cb3 Move L0HwHelper ownership to RootDeviceEnvironment 5/n
Related-To: NEO-6853
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>

Use RootDeviceEnvironment getHelper<L0CoreHelper> for
- enableFrontEndStateTracking
- enablePipelineSelectStateTracking
- enableStateComputeModeTracking
- enableImmediateCmdListHeapSharing
- platformSupportsCmdListHeapSharing
- platformSupportsStateComputeModeTracking
- platformSupportsFrontEndTracking
- platformSupportsPipelineSelectTracking
2022-11-18 14:42:53 +01:00
Szymon Morek
a66e69abc9 Prealloc cmd buffer for CSR only when being used
Related-To: NEO-7361

Currently additional command buffer is
preallocated for all CSRs, even for those which
won't be used by application. This PR changes that

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
2022-11-15 20:06:29 +01:00
Mateusz Jablonski
6490d031aa L0: handle flushTagUpdate error before performing cpu memcpy
Add helper to convert submission status to L0 API error code

Related-To: NEO-7412, NEO-7507
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-11-15 08:30:00 +01:00
Dunajski, Bartosz
002184586c Add command buffer helpers: Conditional BB_START and GPR Inc/Dec
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-11-10 18:56:24 +01:00
Dominik Dabek
30fe24aa79 Avoid cmpexchg due to CPU Hardware limitation
Limit the amount of times compare_exchange_weak is called,
to avoid issues with contention when multiple cpu cores request
the same address.

Related-To: NEO-7030

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2022-11-08 17:11:52 +01:00
Warchulski, Jaroslaw
6cbb3cfb05 Cleanup includes 3
Related-To: NEO-5548
Signed-off-by: Warchulski, Jaroslaw <jaroslaw.warchulski@intel.com>
2022-11-07 14:52:31 +01:00
Dunajski, Bartosz
67af920281 Unify programming of ending commands in direct submission path
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-11-07 10:56:36 +01:00
Maciej Plewka
8a9ea9afd7 Make migration for indirect allocations
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-11-02 14:53:14 +01:00
Mateusz Jablonski
9816f815f3 Propagate exec buffer error to L0 API level on Xe HPC
This change makes that drm file is opened in nonblocking mode for prelim
kernels. In such case when calling exec buffer ioctl and get
EAGAIN (aka EWOULDBLOCK) we may return error to API level

Related-To: NEO-7144

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-10-31 10:09:13 +01:00
Aravind Gopalakrishnan
f9fab3ff49 Update SBA in hybrid immediate and regular commandlist usages
Fix to check and update heap states.

Related-To: LOCI-3379
Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
2022-10-14 11:42:06 +02:00
Compute-Runtime-Validation
71149b29c5 Revert "Propagate exec buffer error to L0 API level"
This reverts commit 9a95f3c62d.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-10-13 06:21:31 +02:00
Mateusz Jablonski
9a95f3c62d Propagate exec buffer error to L0 API level
This change makes that drm file is opened in nonblocking mode for prelim
kernels. In such case when calling exec buffer ioctl and get
EAGAIN (aka EWOULDBLOCK) we may return error to API level

Related-To: NEO-7144
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2022-10-12 17:34:35 +02:00
Zbigniew Zdanowicz
87822f94e2 Replace virtual method call for DC flush with stored bool value 2/n
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-10-12 09:43:01 +02:00
Zbigniew Zdanowicz
31f97717db Replace virtual method call for DC flush with stored bool value 1/n
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-10-11 13:27:58 +02:00
Zbigniew Zdanowicz
63df08664a change interface to enable tracking of other n-p state commands per platform
Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-10-10 12:50:40 +02:00
Lukasz Jobczyk
b21fef96cb Wait for events from host
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2022-10-10 12:12:13 +02:00
Zbigniew Zdanowicz
0270e0f8a5 Add interface to enable state compute mode tracking per platform
Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-10-07 09:55:03 +02:00
Dunajski, Bartosz
52b63be026 Remove isCleanLeftoverMemoryRequired() + refactor sampler support path
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2022-10-04 16:24:03 +02:00
Zbigniew Zdanowicz
f0888fece2 Rename command list tracking debug flag and variables
This change reflects exact nature of debug variable and what is code
actually doing

Related-To: NEO-7187

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-26 18:59:39 +02:00
Zbigniew Zdanowicz
57d35c8932 Add state compute mode tracking
Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-26 14:36:37 +02:00
Zbigniew Zdanowicz
fbc91887b8 Add small performance tweak
Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-23 18:44:50 +02:00
Zbigniew Zdanowicz
5986a7199a Share front end state updates between regular and immediate command lists
Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-23 09:46:35 +02:00
Zbigniew Zdanowicz
e960802e33 Add pipeline select state tracking
This optimization removes pipeline select from command list preamble
and presented to command queue for necessary state update.
Code is disabled by default and available under debug key.

Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-23 08:21:00 +02:00
Maciej Plewka
1458602efc Store indirect residency at command queue level
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2022-09-22 14:07:19 +02:00
Zbigniew Zdanowicz
7832195cd8 Change level zero command queue internal interface for front end programing
Front end estimation use internal loop for command list browsing and
estimation of each command list.
This refactor moves internal loop into external execution, so command list
browsing in loop can be shared by all state commands.
This refactor - sharing loop - will correct performance of each added state
estimator.

Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-21 12:12:15 +02:00
Maciej Bielski
56cb1f757b programStateBaseAddress: improve code reuse
Another step towards cleaner callers of
StateBaseAddressHelper<>::programStateBaseAddress.

Export programming state base address into a separate function to
improve code reuse and reduce copy-pasted fragments, which make code
modifications or maintenance more and more difficult over time. Use
specialization for gen-specific variations.

Related-To: NEO-6774
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
2022-09-21 11:54:57 +02:00
Compute-Runtime-Validation
643e21631c Revert "Store indirect residency at command queue level"
This reverts commit ffad5c6c09.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2022-09-20 18:12:12 +02:00
Maciej Plewka
ffad5c6c09 Store indirect residency at command queue level
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>

Related-To: NEO-7211
2022-09-19 17:01:20 +02:00
Zbigniew Zdanowicz
065406e222 Do not use heap for command queue command buffer manager
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-19 15:24:52 +02:00
Kamil Kopryk
0ce963d84a Remove not needed cmdbuffer memsets
Related-To: NEO-7156
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-09-19 13:48:25 +02:00
Kamil Kopryk
b694a639a3 Move clean leftover memory logic to separate function
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
2022-09-19 12:55:25 +02:00
Zbigniew Zdanowicz
8eaa9d690e add tracking of the state of pipeline select for command lists and queues
This change prepares infrastructure for pipeline select handling in
command lists and queues by optimization of number of commands dispatched.
State is synchronized between flush-task immediate and regular command lists.
Next step is to add optimization itself which disables legacy hw command
dispatch algorithm.
This change corrects ADL-P support for systolic mode changes.

Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-19 11:57:34 +02:00
Zbigniew Zdanowicz
357514a4e4 make single function overriding driver state using debug key
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-16 11:34:05 +02:00
Zbigniew Zdanowicz
218a98f7f7 Refactor of pipeline select programming
Adding new interface to cooperate with hw context state
Simplify programming removing unnecessary functions
Code optimization that stop using expensive call and instead
stores configuration parameter

Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2022-09-15 15:38:10 +02:00