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6a1a28c68799efc48959cd963d48ee2d8687f8d4
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11 Commits

Author SHA1 Message Date
Milczarek, Slawomir
aa18a62d70 A partial unification of AUB and TBX CSR classes 
This commit moves initialization of global MMIOs from AUB CSR to Simulated CSR

Change-Id: I93a612d4f0c82e7135287f6508870190790141bc
 2018-11-10 13:12:22 -08:00
Hoppe, Mateusz
eb9d720788 Add PTE address check 
Change-Id: I00cdf828009a347a93eb0448bf678b670d287304
 2018-10-15 13:06:20 +02:00
Artur Harasimiuk
40146291ad Update copyright headers 
Updating files modified in 2018 only. Older files remain with old style
copyright header

Change-Id: Ic99f2e190ad74b4b7f2bd79dd7b9fa5fbe36ec92
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-09-20 18:02:35 +02:00
Hoppe, Mateusz
619d2217cb Pass AubHelper to reserveAddressPPGTT(). 
- get PageTable entry data hints and address space from AubHelper
based on local memory flag
- add enableLocalMemory flag in CSR HW

Change-Id: I061bda62be8da55d52cff48ecddcf26c4212dc67
 2018-09-17 18:48:06 +02:00
Milczarek, Slawomir
991bbddeba Add function to get Page Table entry bits 
This commit adds a helper function to get Page Table entry bits
and control a configuration of first levels page walks (non-PTE).

Change-Id: I85666ffae8e89a193d1ac4a065c2b84b814d47ec
 2018-09-11 14:10:42 +02:00
Hoppe, Mateusz
23d66b6984 Add dedicated method for getting hint for AubDump memory write 
Change-Id: I5282d3004e61dde4bda1fd0e0c1acf9fe94caca0
 2018-08-21 10:28:59 +02:00
Milczarek, Slawomir
fb10f666e9 AUB CSR: Ensured PTE bits be set correctly for Global GTT 
This commit fixes the issue with setting reserved bits in PTE for GGTT.

Change-Id: I08582e20914419a3363c9e61085dcf03ba355a61
 2018-06-21 22:23:01 +02:00
Zdanowicz, Zbigniew
f94844305f Add new arguments to aub dumping interface 
Change-Id: I226ec04a919f4ca6ae5c237cf189e043f8286d5e
 2018-05-10 13:33:54 +02:00
Artur Harasimiuk
5fbdad88c6 refactor config.h usage 
- add defines to command line
- remove most occurences of include "config.h"

Change-Id: I19d65d83c895fc6143d319d057a50e5ae3e78830
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-04-26 10:02:15 +02:00
Milczarek, Slawomir
fcb9a591b0 Add AUB generation in parallel to execution on TBX 
This commit adds support for AUB capturing with simultaneous execution on TBX

Change-Id: I046bac6b953708007c525050fbf9357120a310b6
 2018-03-08 16:52:52 +01:00
Brandon Fliflet
7e9ad41290 Initial commit 
Change-Id: I4bf1707bd3dfeadf2c17b0a7daff372b1925ebbd
 2017-12-21 00:45:38 +01:00