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2884 Commits

Author SHA1 Message Date
Compute-Runtime-Validation
a5614a1c66 Revert "Destroy resource handle when created" 
This reverts commit 011a0dd497.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-08-12 09:16:34 +02:00
Jim Snow
a00e84ebba Allocate RTStack based on full-die EU count. 
Related-To: LOCI-3334

Signed-off-by: Jim Snow <jim.m.snow@intel.com>
 2022-08-11 23:32:59 +02:00
Zbigniew Zdanowicz
0ecc08337e Add debug flag that overrides control of wddm evict flag 
Related-To: NEO-7179

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-08-11 12:06:11 +02:00
Zbigniew Zdanowicz
7d6bd45604 Unify programming additional flags for front end command 
Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-08-11 10:57:32 +02:00
Krystian Chmielewski
9bd2c7da2b refactor(zebin decoder): parsing enums 
This commit simplifies parsing of enums in zebin decoder and removes
unnecessary tests.

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
 2022-08-10 23:36:25 +02:00
Mateusz Jablonski
7b86c8da2e Add support for limiting number of CCS engines 
This commit adds support for ZEX_NUMBER_OF_CCS flag which can be used
for limiting number of CCS engines

Format is as follows:

ZEX_NUMBER_OF_CCS=RootDeviceIndex:NumberOfCCS;RootDeviceIndex:NumberOfCCS...

i.e. setting Root Device Index 0 to 4 CCS, and Root Device Index 1 To 1 CCS

ZEX_NUMBER_OF_CCS=0:4,1:1

Related-To: NEO-7195
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-08-10 19:38:03 +02:00
Kacper Nowak
f219617823 Zebin: Do not fail on parsing unrecognized intelGT note types 
When an IntelGT note type is not recognized, skip it instead of
returning negative target device validating result.
Related-To: NEO-7190
Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
 2022-08-10 17:04:22 +02:00
Zbigniew Zdanowicz
50a27bd48e Add gdi system functions logging 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-08-10 16:32:19 +02:00
Zbigniew Zdanowicz
1b9d50660a Unify programming of binding table base address command 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-08-10 14:35:02 +02:00
Kamil Diedrich
011a0dd497 Destroy resource handle when created 
Do not create resource when cpuPtr is set

Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
 2022-08-10 12:35:49 +02:00
Krystian Chmielewski
eecde9114a feat(zebin): add image metadata support 
This commit adds support of image metadata in zebin format.

Resolves: NEO-7251

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
 2022-08-10 00:06:51 +02:00
Kacper Nowak
f774deffa7 Zebin: ZEBinary ELF versioning in intelNoteGT section 
This commit adds support for new ZEBinary ELF versioning mechanism.
- Add new IntelGTSecionType: ZebinVersion
- Add mechanism for retrieving zeInfo/elf version in intel.notegt
section
Related-To: NEO-7190
Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
 2022-08-09 17:58:12 +02:00
Mateusz Jablonski
3d9b5d441a Add UNRECOVERABLE_IF to avoid nullptr dereference 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-08-09 15:44:49 +02:00
Jitendra Sharma
900c9ffc42 L0 Debug Win: device Thread Id remapping for run control 
Related-To: NEO-6971

Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
 2022-08-09 15:15:50 +02:00
Kamil Diedrich
b39be32e20 Add member for handling additional adapterInfo fields 
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
 2022-08-09 14:11:05 +02:00
Neumann, Marta
d8cd596baf Add device ID for ADLS (0xA78B) 
Related-To: NEO-7240

Signed-off-by: Neumann, Marta <marta.neumann@intel.com>
 2022-08-09 13:55:30 +02:00
Mateusz Jablonski
6450be2414 Remove redundant device and revision id members from Drm class 
Drm should set these values directly to hw info in root device environment

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-08-09 10:13:32 +02:00
Mateusz Jablonski
762aebaea3 Make drm_neo.cpp independent on i915 headers 
Related-To: NEO-6999
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-08-08 22:13:22 +02:00
Mateusz Jablonski
3b3d40252e Revert "Limit number of CCS engines on PVC" 
This reverts commit 8f8370be32.

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-08-08 18:40:24 +02:00
Rafal Maziejuk
ed0c36117e Apply heuristics when setting TG dispatch size on XE_HPC_CORE 
The default TG dispatch size can be changed
to a better value based on number of threads in TG or
currently available amount of threads on GPU.
Decision on what TG dispatch size should be are based on
implemented heuristics.

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-6989
 2022-08-08 16:43:10 +02:00
Lukasz Jobczyk
eb8cd33dc6 Do not flush tag update if already flushed 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-08-08 14:11:42 +02:00
Mateusz Jablonski
8f8370be32 Limit number of CCS engines on PVC 
Expose only one CCS engine

Related-To: NEO-7195
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-08-08 14:05:35 +02:00
Lukasz Jobczyk
ba244634b3 Set the default value of the controller timeout divisor to 1 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2022-08-05 09:52:58 +02:00
Kamil Kopryk
8b5c567bea Remove wait on user fence during cmdlist destroy/reset 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Related-To: NEO-7156
 2022-08-05 09:24:04 +02:00
Philippe Lecluse
a931f1654e Add new enum values to DrmIoctl 
Signed-off-by: Philippe Lecluse <philippe.lecluse@intel.com>
 2022-08-05 00:40:21 +02:00
Neil R Spruit
ada9b5d4a9 Handle if L0 Event Memory is Shareable 
- Properly check for IPC event handle flag to determine if the event
pool memory is sharable between processes.
- Given Host Visible Event Pool, a check is done to determine if the
Host memory can be shared between the processes.
- Enabled handling if Event Host Memory is shareable for DRM
- If Event Pool Memory is Not shareable, then retrieving the IPC Event
Pool Handle returns unsupported.

Signed-off-by: Neil R Spruit <neil.r.spruit@intel.com>
 2022-08-05 00:11:05 +02:00
Cencelewska, Katarzyna
61510e9a92 Revert optimization of gpgpu csr's mutex lock in the enqueue blit 
optimization available under flag
ForceCsrLockInBcsEnqueueOnlyForGpgpuSubmission

Related-To: NEO-7011
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
 2022-08-04 16:42:50 +02:00
Milczarek, Slawomir
601ace6a25 Add unit test for append memory prefetch for regular command list 
Related-To: NEO-6740

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2022-08-04 10:32:08 +02:00
Compute-Runtime-Validation
3a31caf44a Revert "Add member for handling additional adapterInfo fields" 
This reverts commit aafbbf54db.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-08-04 09:36:36 +02:00
Dunajski, Bartosz
98d776867f Add initial support for KernelArgsBuffer allocation 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-08-03 20:28:21 +02:00
Kamil Diedrich
aafbbf54db Add member for handling additional adapterInfo fields 
Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
 2022-08-03 16:14:46 +02:00
Filip Hazubski
64babcf22c Rename cl_intel_subgroup_matrix_multiply_accumulate extension 
Use cl_intel_subgroup_matrix_multiply_accumulate in place
of previous cl_intel_subgroup_matrix_multiply_accumulate_for_PVC

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-08-03 11:46:29 +02:00
Milczarek, Slawomir
046f9d95fc zeCommandListAppendMemoryPrefetch with memory prefetch manager 
Related-To: NEO-6740

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2022-08-02 20:07:31 +02:00
Compute-Runtime-Validation
00ff0dc337 Revert "Destroy resource handle when created" 
This reverts commit 5a6a90aa0e.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-08-02 11:04:10 +02:00
Milczarek, Slawomir
9f36b20423 Bind buffer object before calling vm prefetch 
Related-To: NEO-6740

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2022-08-01 15:03:21 +02:00
Dunajski, Bartosz
53a3cd2cdd Add method to merge LSH pipelined state during cmd list execution 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-07-28 17:32:53 +02:00
Igor Venevtsev
4cb9ad5d55 Debugger L0 Win: implement module destroy event 
Related-To: NEO-6723

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2022-07-28 15:55:40 +02:00
Zbigniew Zdanowicz
f17b46bc22 Reposition members of wddm classes 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-07-28 14:31:12 +02:00
Zbigniew Zdanowicz
c52a200087 Reorder debug flag definitions 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-07-28 14:30:57 +02:00
Mateusz Jablonski
50c0e07bec Move drm wrappers checks to separated cpp 
Related-To: NEO-6999
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-07-28 13:23:06 +02:00
Kamil Diedrich
5a6a90aa0e Destroy resource handle when created 
When allocation is created and createResource is set we need to
remove resourceHandle instead of allocation handle list otherwise
in long running application (a lot of allocations) we will observe
memory leak.

Signed-off-by: Kamil Diedrich <kamil.diedrich@intel.com>
 2022-07-28 13:22:52 +02:00
Rafal Maziejuk
af91f94098 Improve calculateAvailableThreadCount implementation 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2022-07-28 11:43:14 +02:00
Kamil Kopryk
fe0c857f1a Cleanup includes 5/n 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-07-28 11:33:01 +02:00
Zbigniew Zdanowicz
0c301e5e99 Limit preemption programming in level zero command queues 
When multiple command queues use the same context and retain the same state
No preemption programming for copy command queues
Program preemption preamble only for mid thread preemption

Related-To: NEO-7187

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-07-28 10:05:10 +02:00
Kamil Kopryk
17f22990e6 Cleanup includes 4/n 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-07-28 09:44:48 +02:00
Compute-Runtime-Validation
b3078cfbae Revert "Change DG2 l1 cache policy to WB" 
This reverts commit 9a5e619c42.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-07-28 07:27:13 +02:00
Mateusz Jablonski
6bdc920d21 Add wrappers for I915 macros for struct definition 
Related-To: NEO-6999
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-07-27 17:04:04 +02:00
Kamil Kopryk
0603819b68 Cleanup includes 3/n 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-07-27 15:28:13 +02:00
Zbigniew Zdanowicz
469ab367b1 Limit number of pipeline select commands when using multiple command queues 
Related-To: NEO-7187

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-07-27 12:44:03 +02:00
Kamil Kopryk
5a3746df76 Cleanup includes 2/n 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-07-27 12:01:36 +02:00