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571 Commits

Author SHA1 Message Date
SaiKishore Konda
e28f937683 Add SubDevice support for Sysman Memory module 
Change-Id: Iec5918486fc2c00e14de074aca18e6de63ba1600
Signed-off-by: SaiKishore Konda <saikishore.konda@intel.com>
 2020-09-29 11:36:21 +02:00
Daniel Enriquez
2d27570292 Fix current voltage unit problem, returning Volts now. 
Change-Id: I257e431f5dbc4d71191ce50750791746d8bba8d9
 2020-09-29 01:48:35 -07:00
Maciej Plewka
e34c319ed7 Special address pool at External heap begining 
Change-Id: I7da6e67010ff7a819aec25abea9213b6e43e348e
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2020-09-29 07:51:12 +02:00
Aravind Gopalakrishnan
79498dee93 Write global timestamp for copy engine 
Change-Id: I6953ed787d7e21defcec07549c436c8b280be521
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@intel.com>
 2020-09-28 21:45:53 +02:00
Jaime Arteaga
d0e1d5cffb Link zello samples to ze_loader 
And make L0 Core samples to be built on Debug, as it is with
zello_sysman

Change-Id: Ie1e6b0a766237006916769e7347fcd2219058e2b
Signed-off: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2020-09-28 20:09:35 +02:00
Bartosz Dunajski
55bd544402 Lazy evaluate arguments of printDebugStrings(...) function 
Change-Id: Ie44e109fd9235c5df32fb90b9e6fc6058e558a99
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-09-25 18:38:58 +02:00
Sebastian Luzynski
d24850cff3 Alter API with additional kernel exec info. 
Related-To: NEO-4875
Change-Id: I10a5e3bfc32be520c3554c992dc36591fc1ff599
Signed-off-by: Sebastian Luzynski <sebastian.jozef.luzynski@intel.com>
 2020-09-25 13:00:24 +02:00
Jim Snow
9f858c29a2 Enable internal image creation to return error codes 
Change-Id: I20f28b57f3cd96245ce2dc1657ef2b40e63c0bc0
Signed-off-by: Jim Snow <jim.m.snow@intel.com>
 2020-09-25 12:07:07 +02:00
Spruit, Neil R
7ea864cbd2 Update Kernel Buffer Argument given nullptr value assignment 
- Given a nullptr Arg Buffer value, the argument value in cross thread
data must be updated to be a nullptr value especially given the argument
could have been set previously to a buffer that may not exist or should
not be used during this call to the kernel

Change-Id: Ie3a03ce25a4bb0b5e186863cc912a55863d0fb69
Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
 2020-09-25 00:43:00 +02:00
Vinod Tipparaju
8d0df0c8a7 Reset cmdList - Fix to set genericMediaStateClear bit during programSBA 
This resolves corruptions by flushing ID cache on HW

Change-Id: I56919360ac126cec67c5cbcf6380acfd72e0bcdb
Signed-off-by: Vinod Tipparaju <vinod.tipparaju@intel.com>
 2020-09-24 13:42:04 +02:00
Aravind Gopalakrishnan
72c91c2f13 Do not program SBA for copy engine 
Doing so causes hangs when reusing a copy command list

Change-Id: I1bd069942e9caee01636497f992dd35cbedcde1b
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@intel.com>
 2020-09-23 08:31:21 -07:00
Bartosz Dunajski
bb788b4cc4 Copy ISA on CPU if BCS is not supported 
Change-Id: I18b0bea70a0104dfa3f930ee360b9967f8d615be
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-09-23 16:47:02 +02:00
Kanhaiya
723e852c09 Moved all the constants used in sysman to the single header file 
Change-Id: I0bfa02e68c9aba1cc5d3105c37630b30b03e1b54
Signed-off-by: Kanhaiya <kanhaiya.singh@intel.com>
 2020-09-23 14:35:13 +02:00
Bartosz Dunajski
2a69b1ed78 Select correct heap base address for ISA 
Change-Id: I400f965faa4615519729756daa78350a46c46ff2
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-09-23 14:21:22 +02:00
Kamil Diedrich
877a781696 Add engine type to commandList 
Change-Id: I108fc027dd4698ebecb224c20b92f2b741698f3c
 2020-09-23 09:46:53 +02:00
Zbigniew Zdanowicz
03c8bbf054 Use non-coherent buffers as kernel args in L0 
Change-Id: I78f699779d65b694fa8de82c8e19dc07f7c176c3
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-09-23 07:16:13 +02:00
Bartosz Dunajski
9a29a75600 Use BCS to copy ISA if required - part 2 
Change-Id: I8a06433640cb3ce6de8f1e1a367501572a6f77de
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-09-22 10:43:12 +02:00
Aravind Gopalakrishnan
2e912aff52 Add device capability for timestamp valid bits 
Change-Id: Ib4a0f4ce80f0fc3649f366ceb458e8f506a97e34
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@intel.com>
 2020-09-21 18:15:54 +02:00
Mateusz Hoppe
7fdfa870fe Enhance module unit tests 
Change-Id: I0952b0c4c3872a719afbc95646fcb79e84eca938
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2020-09-21 17:15:36 +02:00
Bartosz Dunajski
5b31b31734 Remove low priority and internal engine index variables 
Change-Id: I984dbcedd5456cfdee284f4d2eda1371ba77f0d0
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2020-09-21 16:44:14 +02:00
Mateusz Jablonski
83ed9d9ee4 Minor cleanup around L0 Fence 
remove duplicated functions

Change-Id: I815221835b87ab05317b2ac4436ea1321ccd7cab
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2020-09-20 21:18:35 +02:00
Jitendra Sharma
13b8929832 Retrieve Sysman engine property onSubdevice/subdeviceId field 
Change-Id: Ifc26cbe1d6398d0c08a0e52c39936c517efca43e
Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
 2020-09-20 07:00:21 +02:00
Daniel Enriquez
f0907361ff Adding Frequency Support for Windows in Level 0 Sysman 
Change-Id: I8dbf67b0a6f88379a3da304e01a8f102e2027dd1
 2020-09-19 08:30:13 +02:00
Mateusz Jablonski
69ea73cba0 Remove not used function 
Change-Id: I4596394736a3d55a9ce449eee151dc84ffe29d72
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2020-09-18 13:33:07 +02:00
Lukasz Jobczyk
b81a78d0e9 Evict USM cpu allocation after migration 
Related-To: NEO-5007

Change-Id: I3c91af3ca22cb6233d530b252cc0c75d8fc2f8b5
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2020-09-18 13:01:45 +02:00
Vinod Tipparaju
c7ec23c836 Minor fix to take care of uninitialized variables 
Change-Id: I6172dbb5c92d072561f3b710e663794e9f35411a
Signed-off-by: Vinod Tipparaju <vinod.tipparaju@intel.com>
 2020-09-17 19:46:37 +02:00
Mateusz Hoppe
d363448515 Interfaces to register resources 
Change-Id: Ic587aaa5a41e4e7648211cfa730a0aa5bbc2985a
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2020-09-17 12:39:16 +02:00
Vinod Tipparaju
d2b218d82d Return ZE_RESULT_OUT_OF_MEMORY when alloc on device fails during cmdlist create 
Change-Id: Ia03e7ac190598c56de044d3ad8216087b8da94f2
Signed-off-by: Vinod Tipparaju <vinod.tipparaju@intel.com>
 2020-09-17 00:09:22 +05:30
Zbigniew Zdanowicz
394e626db9 Refactor programming of surface states 
Related-To: NEO-5069

Change-Id: Id7442fcdcc8c7df57f00e8dc383c11869bf1a677
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-09-16 11:54:00 +02:00
Daniel Enriquez
dee1c687a9 Add Engines Support for Windows 
Change-Id: Ibad56d39b563c543e8a23fa92cc9844c69a62352
 2020-09-15 21:36:32 +02:00
Jitendra Sharma
e904a1f0b4 Create Sysman Frequency API handles based on available subdevice/device 
Change-Id: I2049515150004551c3f61647d20f1df7b375f587
Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
 2020-09-15 18:12:14 +02:00
Mateusz Hoppe
d0a6b8aece Adjust BuildOptions used in level_zero 
Change-Id: I0974127beca07012758d4e57402867754c94d388
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2020-09-15 16:41:36 +02:00
Maciej Dziuban
69af210d1d Add timestamp allocations to residency container 
Change-Id: I0b7c41b3dd59d576cdf360fe022b7a812394a4c9
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2020-09-15 12:59:50 +02:00
Jaime Arteaga
a28e883691 Set UUID in driver properties 
Change-Id: If0ce1e426f7021374a7ae8779f47d531f031be5b
Signed-off: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2020-09-15 11:42:45 +02:00
Jaime Arteaga
57e462d8ee Remove legacy affinity mask format 
Change-Id: I17e9ad131c888bdaceb7d14dd7b5aa9b5aec14d7
Signed-off: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2020-09-15 11:42:04 +02:00
Zbigniew Zdanowicz
7d506e3608 Add debug flag to enable compression in L0 USM allocations 
Related-To: NEO-5069

Change-Id: Icbfeb8d72cd764bb3c90d5c699998455f81dd3ee
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2020-09-14 12:47:33 +02:00
Mateusz Hoppe
a5c556fe11 Create TestEnvironment in ze_intel_gpu_core_tests 
Change-Id: I85306b59e220c34ee6b43790b59f5ad96ea51eca
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2020-09-11 09:53:58 +02:00
Konstanty Misiak
9aa1eadd11 Recompile L0 builtins from intermediates when debug flag is enabled 
Related-To: NEO-5020

Change-Id: I7c92ad6ff5bdbe19a25503385fe270e7d5dd330e
Signed-off-by: Konstanty Misiak <konstanty.misiak@intel.com>
 2020-09-10 16:02:25 +02:00
Kamil Diedrich
401380b69c Fix typo 
Change-Id: I53d2ffbc25fa5c699bdf038e99b6a1a8c2acf7f6
 2020-09-09 15:10:33 +02:00
Kamil Diedrich
5823450343 Refactor in queryKernelTimestamps 
Change-Id: Icc0731c973fe797946eea06db29b0737ceef8778
 2020-09-09 12:56:32 +02:00
Kacper Nowak
5358f2cf9c Create a library with .spv kernels for L0 use 
Change-Id: Ia319c5621e363f750159d58aaedd81e411d3babb
Signed-off-by: Kacper Nowak <kacper.nowak@intel.com>
 2020-09-08 13:06:40 +02:00
Vilvaraj, T J Vivek
933bb45dcc Boilerplate Code for Sysman Firmware API 
Change-Id: I8299bdf4b388bb05de7640240d033ba680e5ca14
Signed-off-by: mraghuwa <mayank.raghuwanshi@intel.com>
Signed-off-by: Vilvaraj, T J Vivek <t.j.vivek.vilvaraj@intel.com>
 2020-09-08 10:47:17 +02:00
Jaime Arteaga
9ceff528b5 Add toggle for enabling indirect access 
Change-Id: I35d3e1580cd51fea5f6b139d524737e400f6e1bc
Signed-off: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
 2020-09-08 00:09:28 -07:00
Kamil Kopryk
145fd87f5d Revert "Add adjustPlatformCoreFamilyForIgc helper" 
This reverts commit 8fffdcc111.

Change-Id: I0415b004ef0a1465bc2658cadc66f21a99302eca
 2020-09-08 07:36:26 +02:00
Michal Mrozek
b9b01c09bc Remove incorrect code. 
- we always need to flush the cache.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>

Change-Id: I348d04649b8c01a6fb9ec29a15fd0a77f0b2aec2
 2020-09-07 17:29:14 +02:00
Maciej Dziuban
abacd69def Optimize appendWriteGlobalTimestamp 
Change-Id: Ia63a6324c3ce3dbdc18b790b3d9c2fbe4340e88c
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
Resolves: NEO-5061
 2020-09-07 17:25:59 +02:00
Jitendra Sharma
38ecb25ee6 Add support to query PMU counters 
This change adds support to get engine active time and timestamp
from PMU interface.

Change-Id: I486dcce9fef3c7dc3f73fb8c7ea4c0bd020a6807
Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
 2020-09-07 16:15:21 +02:00
Vilvaraj, T J Vivek
f211578148 add support for multiple engines in scheduler API. 
Change-Id: I2d530f88b8f4c8646c00ed712e5a07bb8439b759
Signed-off-by: Vilvaraj, T J Vivek <t.j.vivek.vilvaraj@intel.com>
 2020-09-07 15:57:30 +02:00
Matias A. Cabral
0f020b6da7 New Sysman black box test 
Sysman test to exercise Sysman APIs and show system info

Change-Id: I16c1d93eb73d54925a113bc6035100654764779c
Signed-off-by: Matias A. Cabral <matias.a.cabral@intel.com>
 2020-09-04 03:49:17 +02:00
Vilvaraj, T J Vivek
831e87eef8 Sysman memory modification based on product. 
Change-Id: I01f4c3cc6fe2376293d48131492f9d686fbdb5ae
Signed-off-by: Vilvaraj, T J Vivek <t.j.vivek.vilvaraj@intel.com>
 2020-09-03 21:41:04 +02:00