Commit Graph

19 Commits

Author SHA1 Message Date
Bartosz Dunajski
6dd07bd3bc Use correct Heap32 index for local memory allocations
Change-Id: I068f712ab2b05ee3d5a9716b21de685a7fee3a02
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2020-07-01 17:31:43 +02:00
Jaime Arteaga
8113fafe53 Disable cross-device indirect access
Change-Id: I57655abfc02785dfd68384a1546ee4cfdbea938a
Signed-off: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2020-06-30 21:42:47 +02:00
Raiyan Latif
b73c757a82 Add indirect allocations to residency at kernel submission time
Change-Id: Idc6ce7ac72de84107990a5c9786c868d4bfa4322
Signed-off-by: Raiyan Latif <raiyan.latif@intel.com>
2020-06-26 01:54:09 +02:00
Mateusz Hoppe
15b91c4d45 Program debug commands for DebuggerL0
Related-To: NEO-4547, NEO-4549

Change-Id: Idf9139190a85aae7ec52de7a1899a46123809e63
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2020-06-24 15:48:38 +02:00
Mateusz Hoppe
f4ef256900 Program hardware context in L0 command queue
Related-To: NEO-4577

Change-Id: I204a5e86ad3b23b71071bbbfd58c23a408f6865f
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2020-05-29 13:07:38 +02:00
Jaime Arteaga
276269788b Add support for thread arbitration policies to Level Zero
Change-Id: I6bbb2ff75dbd930b72a4f60acb0c3a9f372671cb
Signed-off: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2020-05-28 11:40:05 +02:00
Mateusz Hoppe
ef4fae3903 Enable TBX mode in level zero
RelatedTo: NEO-4644

Change-Id: I76913d6b7c7d978a5a90a7a574778c67283497c1
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2020-05-06 16:33:15 +02:00
Zbigniew Zdanowicz
b2210fa5bb Refactor MemorySynchronizationCommands class
Related-To: NEO-4338

Change-Id: Id0ae9c73293fd99f53fccc11a69ca14fa9a6d119
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2020-04-27 17:33:31 +02:00
Jaime Arteaga
04bb54d1ac Flush print buffer when destroying the command queue
This ensures all pending prints are flushed, in the case
for instance zeCommandQueueSynchronize() is not called.

Change-Id: I4b50c535e4681eff4708242febc948c21c715055
Signed-off: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2020-04-10 13:15:23 +02:00
Zbigniew Zdanowicz
5e98368dad Remove RMW access patterns from functions programming on gfx memory
Related-To: NEO-4338

Change-Id: I8fe555525f937e75c5439702b328c734af9af1f9
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
2020-04-09 18:49:30 +02:00
Maciej Plewka
691a4ea823 Add blit copy implementation for L0
Change-Id: I327a4cf977e166cb648ee9f3a79374f7cefa7b1b
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
2020-04-09 13:36:09 +02:00
Jaime Arteaga
29464fb9ad Correct root device index in SBA programming (2)
Add ULT

Related-To: NEO-3691

Change-Id: I61f6ba9b988b5245a2657c38c7bb0b94fbb3a295
Signed-off: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2020-04-08 11:54:26 +02:00
Bartosz Dunajski
a56c27799b Constructors cleanup
Change-Id: I3b69c3951929588f346ad8557ca9a7808afe1c84
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
2020-04-06 14:06:22 +02:00
Jablonski, Mateusz
6d4832fe24 Correct root device index in SBA programming
Related-To: NEO-3691
Change-Id: I568072d0f915484cc81a1d336f6efd86cba76f62
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
2020-04-03 14:36:23 +02:00
Filip Hazubski
d0527e1049 Rename memory_constants.h to constants.h
Change-Id: I05b5d20bac12935dc6625b94adc3a03c98c19b49
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2020-04-02 14:19:39 +02:00
Filip Hazubski
a7e4ad4eba Add unspecifiedDeviceIndex constant
Change-Id: I146e9c80ce0d18aae5e56fadf83f5e1603173fd7
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2020-04-01 20:37:05 +02:00
Lukasz Jobczyk
d1bc7199de Switch to 3D pipeline to program selected commands - part 2
Resolves: NEO-4447

Change-Id: I1dd6a9694cdf3be19aadec1cd139c466baecbcd7
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2020-04-01 10:42:55 +02:00
Mateusz Hoppe
6dc5810c7f Add more cmdlist tests
Related-To: NEO-4515

Change-Id: Idc0e0cdab97cb1a2437c212cbe8ae2bcf673125f
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
2020-03-27 18:26:47 +01:00
Jaime Arteaga
d96e462754 Reorganize Level Zero Core API files
Change-Id: I95750b90748dd65310fa72b030ea3ab2f72d3f24
Signed-off: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
2020-03-25 11:21:43 +01:00