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624 Commits

Author SHA1 Message Date
Mateusz Jablonski
374863ba08 refactor: remove cl pipe related logic 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2025-02-25 17:56:53 +01:00
Fabian Zwoliński
bf20ae7ae8 fix: configure ISA Pool params based on productHelper 
When is2MBLocalMemAlignmentEnabled returns true,
increase pool size for builtins from 64k to 2MB.

Additionally, set appropriate alignment for kernel ISA heap allocations.
Additionally, configure isaAllocationPageSize based on productHelper

Related-To: NEO-12287
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
 2025-02-20 08:42:35 +01:00
Maciej Plewka
4ed25da5fa refactor: refactor mcs surface handling on xe2 and later 
Related-To: NEO-13290
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2025-02-13 23:00:54 +01:00
Maciej Plewka
5ef1ff574b fix: Don't check aux capable in case of MSAA surface on xe2 and later 
Related-To: NEO-13290
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2025-02-07 16:47:33 +01:00
Fabian Zwoliński
1eb8e0efd9 fix: configure small buffers params based on productHelper 
Refactor buffer pool allocator to support configurable
SmallBuffersParams based on product helper capabilities.

This patch enables setting custom pool
parameters instead of using fixed static values.

For devices with 2MB local memory alignment enabled
(is2MBLocalMemAlignmentEnabled),
use larger pool configuration:
- Pool size: 16MB (up from 2MB)
- Threshold: 2MB (up from 1MB)
- Alignment: 64KB (unchanged)
- Starting offset: 64KB (unchanged)

This improves memory utilization for devices supporting larger memory
alignments
while maintaining original parameters for other devices.

Key changes:
- Moved params from static template to instance member
- Added SmallBuffersParams struct with default/large configs
- Added constructor and setter methods for params configuration

Related-To: NEO-12287
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
 2025-02-07 12:01:23 +01:00
Kamil Kopryk
b8504913e3 fix: allow for image array type if array size is 1 for Xe2 and later 
This commit enabled the use of the array image type with array size 1
from Xe2.
Additinally, it removes two incorrect unit tests, as array size of 0 is not
correct with the OpenCL specification.

Related-To: NEO-13976
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2025-02-05 13:50:05 +01:00
Kamil Kopryk
ef896cc799 refactor: introduce ImageSurfaceState helper class 
Moved global functions to the ImageSurfaceStateHelper class,
with declarations in the header file and definitions in the base .inl
file.
This change reduces compilation time by:
- removing unnecessary includes from the header file
- adding explicit template instantiations, which are faster than
implicit template instantiations.

Additionally, the image_skl_and_later.inl file has been removed as it
is no longer needed, and its implementation has been moved to the base .inl

Related-To: NEO-12149

Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2025-01-30 19:20:31 +01:00
Mateusz Hoppe
ae772c849d test: refactor tests to work with secondary engines 2 
Related-To: NEO-13789

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2025-01-23 12:41:27 +01:00
Compute-Runtime-Validation
af031ee0e3 Revert "performance: align structures for 64-bit platforms" 
This reverts commit 9f07f56f7f.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-01-15 09:02:01 +01:00
Semenov Herman (Семенов Герман)
9f07f56f7f performance: align structures for 64-bit platforms 
Signed-off-by: Semenov Herman (Семенов Герман) <GermanAizek@yandex.ru>
 2025-01-09 06:03:39 +01:00
Dominik Dabek
e61d04a881 fix(ocl): track buffer pool count per device 
Track amount of created buffer pools per device. Do not allocate extra
pools if limit is reached. New contexts will have pooling disabled if
limit is reached on device.

Related-To: NEO-13461

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-12-16 11:38:05 +01:00
Vysochyn, Illia
afd22999cc refactor: Adjust RENDER_SURFACE_STATE structures naming 
Performs minor renaming (mostly capitalization) in order to align with
specification.

Renames L1_CACHE_POLICY to L1_CACHE_CONTROL.

Related-To: NEO-13147

Signed-off-by: Vysochyn, Illia <illia.vysochyn@intel.com>
 2024-11-29 09:43:11 +01:00
Mateusz Jablonski
f86d2cee41 test: remove not used usings/typedefs/variables in OCL tests 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-11-29 07:33:36 +01:00
Oskar Hubert Weber
5dc5c839a6 test: allowing neo ULT build with optimization enabled 2/n 
Fixes mismatched-new-delete warnings

Related-To: NEO-8116

Signed-off-by: Oskar Hubert Weber <oskar.hubert.weber@intel.com>
 2024-11-25 16:21:40 +01:00
Lukasz Jobczyk
7832b115a4 fix: Select csr once for staging buffer memcpy 
Resolves: NEO-13083

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-11-22 15:42:09 +01:00
Maciej Plewka
46c345789d refactor: move depth limitation from release helper to image_hw 
Related-To: NEO-8390, HSD-16021488507
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2024-11-21 11:24:06 +01:00
Dominik Dabek
0a12817664 performance: flag, force zero copy for host ptr 
When debug flag ForceZeroCopyForUseHostPtr is set, add
CL_MEM_FORCE_HOST_MEMORY_INTEL flag to buffers created with
CL_MEM_USE_HOST_PTR.
This makes the buffers use zero copy.

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-11-12 15:43:17 +01:00
Lukasz Jobczyk
b050a83242 performance: Use lock pointer copy for dc flush mitigation 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-10-31 10:53:39 +01:00
Compute-Runtime-Validation
3fcb9b18ee Revert "performance: Use lock pointer copy for dc flush mitigation" 
This reverts commit b8be102455.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-10-31 05:15:07 +01:00
Szymon Morek
cf58be4142 performance: use staging buffer when writing to an image 
Related-To: NEO-12968

Also, don't import usm/mapped allocations for image
operations

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2024-10-30 17:02:13 +01:00
Lukasz Jobczyk
b8be102455 performance: Use lock pointer copy for dc flush mitigation 
Resolves: NEO-12898

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-10-29 21:37:53 +01:00
Compute-Runtime-Validation
f5c433c8f8 Revert "performance: Use lock pointer copy with sfence for dc flush mitigation" 
This reverts commit 8c3c703ec0.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-10-26 14:28:26 +02:00
Lukasz Jobczyk
8c3c703ec0 performance: Use lock pointer copy with sfence for dc flush mitigation 
Resolves: NEO-12898

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-10-25 16:24:40 +02:00
Maciej Plewka
9d6d6e85f1 fix: align thread group to dss size if kernel uses slm 
Related-To: NEO-12133
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2024-10-17 15:30:19 +02:00
Bartosz Dunajski
52e9a6e07f feature: Initial CB events IPC support 
Related-To: NEO-11925

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2024-10-16 13:33:59 +02:00
Wojciech Konior
6b40f9bc5a refactor: engineInstancedType removed 
Related-To: NEO-12594

Signed-off-by: Wojciech Konior <wojciech.konior@intel.com>
 2024-10-09 16:30:48 +02:00
Bartlomiej Wolny
dd2e843599 test: ULT - image destructor test 
Related-To: NEO-9794
Signed-off-by: Bartlomiej Wolny <bartlomiej.wolny@intel.com>
 2024-09-30 10:15:13 +02:00
Mateusz Jablonski
18a7a5f6fa refactor: update hw cmds base from gen8 to gen12lp 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-09-19 18:07:46 +02:00
Mateusz Jablonski
7e218a5f70 test: simplify IsAtLeastGen12lp and IsAtMostGen12lp matchers 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-09-17 13:42:19 +02:00
Mateusz Jablonski
5912b43841 refactor: remove dead code 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-09-17 13:41:50 +02:00
Kamil Kopryk
c7a6a74e4e test: correct expectations in opencl tests if heapless enabled 4/4 
Related-To: NEO-10641
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2024-09-10 09:22:41 +02:00
Kamil Kopryk
d79889c3b2 test: correct expectations in opencl tests if heapless enabled 2/n 
Related-To: NEO-10641
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2024-09-03 11:14:17 +02:00
Lukasz Jobczyk
8b760f8528 performance: Copy hostptr on cpu for host buffer when mitigate dc flush 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-08-30 19:55:45 +02:00
Damian Tomczak
828eb3798e test: BufferL3CacheTests MisalignedAndAlignedBuffer ult fix 
Resolves: NEO-10637

Signed-off-by: Damian Tomczak <damian.tomczak@intel.com>
 2024-08-29 15:59:49 +02:00
Lukasz Jobczyk
5aa5d40937 performance: Mitigate dc flush on LNL Windows 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-08-28 13:35:17 +02:00
Compute-Runtime-Validation
ad0d6f5435 Revert "refactor: Add dc flush mitigation infrastructure" 
This reverts commit e4412e385a.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-08-27 02:35:06 +02:00
Dominik Dabek
a47ca96a42 fix(ocl): allocate small buffer pool uncompressed 
Related-To: HSD-15016054429

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-08-26 13:00:47 +02:00
Lukasz Jobczyk
e4412e385a refactor: Add dc flush mitigation infrastructure 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-08-26 10:38:56 +02:00
Szymon Morek
39ec7facee performance: use BCS for transfers if CCS is busy 
Related-To: NEO-11501

Also, if device is iGPU, don't use staging buffers
in that case.

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2024-07-22 15:36:26 +02:00
Szymon Morek
6a11e8a077 fix: revert changes around zero-copy 
Related-To: NEO-12018

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2024-07-19 12:29:18 +02:00
Szymon Morek
33ab962121 fix: adjust compression hint usage for ocl buffers 
Related-To: NEO-11989

Also, use zero-copy on lnl

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2024-07-18 18:24:48 +02:00
Michal Mrozek
20d6910b66 performance: move usm pool init to first alloc call 
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2024-07-18 16:07:22 +02:00
Compute-Runtime-Validation
9a6403f3bc Revert "refactor: Add dc flush mitigation infrastructure" 
This reverts commit d6076941a8.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-07-15 11:47:30 +02:00
Lukasz Jobczyk
d6076941a8 refactor: Add dc flush mitigation infrastructure 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-07-12 14:45:51 +02:00
Szymon Morek
7d25965a78 performance: change buffer type for new coherency model 
Related-To: NEO-11882

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2024-07-09 09:33:53 +02:00
Compute-Runtime-Validation
38872b7e1b Revert "refactor: Add dc flush mitigation infrastructure" 
This reverts commit 1cba900ad9.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-07-04 08:20:18 +02:00
Lukasz Jobczyk
a96f2ea13a performance: disable blit enqueue on LNL 
Resolves: NEO-11471

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-07-04 05:41:31 +02:00
Compute-Runtime-Validation
b8246d806f Revert "performance: change buffer type for new coherency model" 
This reverts commit c979495265.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-07-03 02:11:19 +02:00
Szymon Morek
c979495265 performance: change buffer type for new coherency model 
Related-To: NEO-11882

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2024-07-02 12:49:41 +02:00
Dominik Dabek
76e8be5c39 fix(ocl): handle gl sharing displayable textures 
Displayable textures always need dc flush.

Related-To: NEO-11694

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-06-27 13:43:20 +02:00