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7747db13e1e6f8d767fded2aeb0ba69bdb38606d
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338 Commits

Author SHA1 Message Date
Mateusz Jablonski
7747db13e1 Deferred deleter: move to next deletion if current deletion cannot be applied 
Change-Id: I7067bc2bc74f92518a33ccb9f9dce9b57cc28637
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-03 15:24:35 +01:00
Mrozek, Michal
09f3f4e856 Move heap32[0] to heap32[3]. 
Change-Id: Icea6eef5646894283725e29ce7ee930284af2673
 2018-12-03 09:32:36 +01:00
Dunajski, Bartosz
0131e66a70 Allow Device creating multiple CSRs [6/n] 
- Introduce default Engine query
- Improve Deferred Deleter usage
- Remove Tag Allocation from Device

Change-Id: Iaa88d8dc0166325acf9a157dcd2217ea408ee285
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-29 16:20:13 +01:00
Katarzyna Cencelewska
3e800d55e6 Add support for dumping cl_cache to specified directory 
Change-Id: I782ff17d0d4b17d3d26db543eb7ae222f75ff8a1
 2018-11-29 13:59:26 +01:00
Maciej Dziuban
1cd59e927a Store residency status for each osContext separately 
Change-Id: I2f17f68dcef6db7b596a69579a435b7ccd24e44b
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-11-29 08:08:25 +01:00
Dunajski, Bartosz
b0de2a11d2 Set OsContext as reference 
Change-Id: I3b682fabde9c2ddb2c33a95aef77bf6ce400a21f
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-27 15:32:14 +01:00
Dunajski, Bartosz
2d77b86e70 Allow Device creating multiple CSRs [5/n] 
- Move Engine type to OsContext
- Move OsContext to CSR
- Improve EngineMapper logic
- CompletionStamp cleanup

Change-Id: I935cb7169c8c48cd09837e20e3da06f6dd3437b9
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-27 14:25:04 +01:00
Pawel Wilma
86ecd1a4b8 Memory leak reported for long string debug variables in ULTs 
This commit eliminates ULTs memory leaks reported for string debug variables
exceeding small string optimization size by calling shrink_to_fit() method
on string debug variables in DebugManagerStateRestore destructor.

Change-Id: I304c5c5c23c80f01fdf13f38cea5b4eceb18a94f
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-11-27 10:07:42 +01:00
Mateusz Jablonski
352450adaa Pass number of os contexts to Graphics Allocation constructor 
Mark unshareable allocations

Change-Id: Ie745dc639d8c6b01e2275d29ee1fb4c6343df2bc
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-21 17:38:02 +01:00
Pawel Wilma
2f15ca0508 Add AUB registry key for additional MMIO registers list 
Change-Id: Ib478e91d8df21c48f83bfa97a4ea72c41c2f065d
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-11-21 16:41:44 +01:00
Maciej Dziuban
c4239dcd3d Refactor WddmResidencyController methods implementations 
- trimResidency
- trimResidencyToBudget
- makeResidentResidencyAllocations

Change-Id: Ibf81e31966c8d8347fd5caf2f6a4bf8fe75fab5f
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-11-21 12:05:37 +01:00
Stefanowski, Adam
96d07db545 Move wddm->init from wddmCSR to getDevices 
Change-Id: If88f526792596108e038ec05c1d305e9452506f2
 2018-11-20 09:40:57 +01:00
Mrozek, Michal
c0f6af1df3 Use maxOsContextCount to initialize trimCandidateList for WDDM allocations. 
Change-Id: Icc65d19ed45bb1aa1a3dba4de536cf85ab9b906b
 2018-11-19 11:24:16 +01:00
Kai Chen
85b60dff0f Linux GPU address allocator for devices with reduced address space 
Code implementation of GPU address allocator for devices with reduced
address space.

Change-Id: Ieb0412c5930fdd71f90741055cf89c0338b01133
Signed-off-by: Kai Chen <kai.chen@intel.com>
 2018-11-19 10:20:25 +01:00
Mateusz Jablonski
66492a53a4 Change type of residency task count to uint32_t 
Move definitions of objectNotUsed and objectNotResident to GraphicsAllocation

Change-Id: I2aec604a865cc6c975e9d1121028cbdd35c0b18a
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-16 16:04:48 +01:00
Maciej Dziuban
969d4da811 Cleanup WddmResidencyController related code 
- Move trimCallback from WddmMemoryManager
- Refactor lastFenceValue accessors to be less generic

Change-Id: I01b31ccb81a5ecc04d07912061326428b07a59bf
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-11-16 08:34:18 +01:00
Mateusz Jablonski
0e0a280803 Create structure UsageInfo for task count and residency task count 
Change-Id: I0899c88d9e567a09ba46461ae69cf6c80f713e67
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-15 14:07:05 +01:00
Mateusz Jablonski
1a89a0103a Register trim callback after creating monitored fence 
Change-Id: Ib0510a0aed180c7bfe883a60632fd642664e1085
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-15 12:47:01 +01:00
Dunajski, Bartosz
728932ed44 Pass Drm object to OsContext on Linux 
Change-Id: I341925eef9bc892f5c321c668736bb6a3aff38f5
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-15 12:04:03 +01:00
Maciej Dziuban
9bdedc62dd Move residency functions to WddmResidencyController 
Change-Id: Ic73a51546b3325515f293808550376fa6b57dec3
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-11-15 11:17:27 +01:00
Mrozek, Michal
4341ad0323 Add PowerSaving debug variable. 
- It allows to easily turn ON the power saving mode for the driver.
- In that mode, whenever GPU is not ready it will put current thread to sleep,
thread is resumed when GPU completes.
- PowerSaving mode reduces CPU utilization on blocking calls, while increasing
completion latencies.

Change-Id: I3de83713687952ac31a1ec8c397f48aa4212781d
 2018-11-15 11:14:08 +01:00
Mrozek, Michal
3c0a6bd24d Remove residency control from Buffer Object. 
- Residency is being controlled by Graphics Allocation.
- Duplicates are now eliminated only for shared resources.

Change-Id: Ib51e2739a07728ae0b94abf6cce2e9981b017111
 2018-11-14 08:32:04 +01:00
Maciej Dziuban
b0acc5ecde Move isMemoryBudgetExhausted to WddmResidencyController 
Change-Id: Ic9da29ab954835e93cfbcd6690c1764d99939613
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-11-06 23:09:20 +01:00
Mateusz Jablonski
815ae851b7 Graphics Allocation: store task count per context id 
Move definition of allocations list method to internal_allocation_storage.cpp

Change-Id: I4c6038df8fd1b9335e8a74edbab33b78f9293d8f
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-11-06 12:43:47 +01:00
Maciej Dziuban
42b2ed6a90 Register trimCallback with WddmResidencyController as Context 
Change-Id: Ibc34aac17e79df3a3096c29c34506039e2c5bdcc
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-11-05 17:43:20 +01:00
Maciej Dziuban
ef02827cd9 Add tests for locking in trimResidency() 
Change-Id: Iddbecedae9cf21a4e5232dcac5d145962623e7d6
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-11-05 15:58:06 +01:00
Zdanowicz, Zbigniew
ce75767ca3 Add AUB registry key to override MMIO offset value 
Change-Id: Iac3bf9074e544a03e38fc437d7b21ea478d9cc5d
 2018-11-03 00:33:50 +01:00
Hoppe, Mateusz
e6b93941ee Add aub_stream headers 
Change-Id: I4d9420210e2a06d8a36abc0cf272901514ff3547
 2018-11-02 14:29:45 +01:00
Stefanowski, Adam
c202c95634 Stop creating osInterface in WddmCSR and DrmCSR constructors 
Change-Id: Ic8ca21824882dfae5df3fe05c7ec1ff96311f286
 2018-10-31 15:01:50 +01:00
Mrozek, Michal
8bec1906ec Remove alignedCpuPtr from WddmAllocation 
- also switch to make_unique in wddm memory manager functions.

Change-Id: I2f7cf412a993040439466f1971d935fb8429ce7c
 2018-10-31 14:07:39 +01:00
Kowalczuk, Jakub
1822fb0747 Control enabling of local memory based on OS and HW Capabilities part 2 
- add EnableLocalMemory debug variable
- separate OSInterface::osEnableLocalMemory for dll and unit tests

Change-Id: I78a1f60364eece28b30ce3e91418e7d72ba3e0d9
 2018-10-31 13:59:42 +01:00
Mrozek, Michal
200228b506 Replace cpuPtrAllocated flag with driverAllocatedCpuPointer. 
Change-Id: Ic0ce165d0e583701e1128595a3d9dabd0a61a84b
 2018-10-31 12:37:20 +01:00
Mrozek, Michal
7ece16ee7a Graphics Allocation cleanup. 
- remove one constructor
- start using mock graphics allocation in tests

Change-Id: Idb8f4a35dbc2cae8d6bf667bab5542d8e91d6e0d
 2018-10-31 11:54:24 +01:00
Maciej Godek
f9ba697587 Sharing queries for DX10/DX11 
Change-Id: Ia4f176a38bb2dbfe215efe17b13a533ee83510d3
 2018-10-31 11:52:46 +01:00
Maciej Dziuban
9c696f1d29 Create STL-friendly SpinLock implementation 
Change-Id: Ic04d34d2962ad6953fe3282a10f6cba16c0e07b3
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-10-31 08:38:32 +01:00
Mrozek, Michal
5b2e16651f Remove alignedSize from WddmAllocation. 
Change-Id: I3b610515e4d5db16ce6a604e7e2f4b85b657bef2
 2018-10-31 08:30:50 +01:00
Mrozek, Michal
1dc3a94ac8 Remove not needed code. 
Change-Id: I5b0fd2960ed7777bc7603013071a431af6d435c5
 2018-10-30 15:40:08 +01:00
Maciej Dziuban
dc4de3c31b Move trimResidency functions to WddmResidencyController 
Change-Id: I046fd34d5336b767ed38eda31e58e4a35ceee5f8
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-10-29 12:19:50 +01:00
Milczarek, Slawomir
7b1d19eaec Moved header with engine node definitions 
Change-Id: Iaa78bb0584589e354b1bb469b729844121decb8f
 2018-10-27 14:51:02 -07:00
Artur Harasimiuk
6aa9b36a7b DebugVariables cleanup 
- small cleanup
- files renaming to match convention

Change-Id: Iff9ed3a509001bcf6f154fc35f6d241ee9a968ae
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-10-26 17:55:25 +02:00
Mateusz Jablonski
d5c9816428 Remove store allocation methods from memory manager 
Move setGPUAddress method to WddmAllocation

Change-Id: I91d877c3791e9eff69276e4258e3ce9c3111ca45
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-26 10:53:43 +02:00
Mateusz Jablonski
129380c1a6 Cleanup host ptr manager 
Change-Id: I0fc9df41a08255eef8072666c1c5c16806e0f7cf
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-26 08:26:38 +02:00
Maciej Dziuban
bd431edb46 Return trimCallbackHandle from register method instead of storing in Wddm 
Change-Id: Iddfb6a926311480e355d52e5bf3e6379ec96f7a9
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-10-25 17:17:52 +02:00
Maciej Dziuban
4aae1a817b Pass Wddm to WddmResidencyController 
Change-Id: I2379ffdfb740a869f6d157ed22f40ce509d6bebe
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-10-25 17:16:41 +02:00
Kowalczuk, Jakub
8ead8f727f Control enabling of local memory based on OS and HW Capabilities 
Change-Id: Ia26c856aeef27fe638b7a6e895cc289859f3c579
 2018-10-25 16:36:47 +02:00
Mrozek, Michal
7319023b0f Add capability to use malloc for Heap32 base. 
- shift page tables to lower bits

Change-Id: I54dcba72255215cf5be75ba425fc27727b0bfd98
 2018-10-25 16:20:00 +02:00
Maciej Dziuban
f374696f1d Move MonitoredFence to WddmResidencyController 
Change-Id: Iac99e7d730fda26d13feed56d5e4c50adf115e51
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-10-24 09:35:42 +02:00
Maciej Dziuban
7fe0a0df06 Delete OsContext from FenceData 
This decoupling is needed to move makeResidentResidencyAllocations into
WddmResidencyController, where we have only contextId, not the context itself

Change-Id: I0d79f1dc7a51fa6b1d713deb6e9003aa2b7be1d4
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2018-10-23 09:17:09 +02:00
Mrozek, Michal
77b00fa749 Do not execute trim callback if there are no registered contexts. 
Change-Id: I9a274281a085cdbeb98a1d495ce9ef9ab897d08a
 2018-10-22 18:53:13 +02:00
Mateusz Jablonski
7ec8e6a3f2 Fix naming convention in host ptr defines 
Change-Id: I9f0d5790031b5067b92159b078768e560990b9c6
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-22 16:29:04 +02:00