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1467 Commits

Author SHA1 Message Date
Chodor, Jaroslaw
5f908ce092 feature: adding support for custom compiler backends 
This adds abbility to load different versions of the backend
compiler based on underlying device.

Related-To: NEO-12747

Signed-off-by: Chodor, Jaroslaw <jaroslaw.chodor@intel.com>
 2024-10-23 19:55:36 +02:00
Bartosz Dunajski
ff80a02fcb refactor: parse extra zebin params 
Related-To: NEO-12591

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2024-10-21 09:59:33 +02:00
Maciej Plewka
9d6d6e85f1 fix: align thread group to dss size if kernel uses slm 
Related-To: NEO-12133
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2024-10-17 15:30:19 +02:00
Tomasz Biernacik
c982981dde feature: add number of rt stacks to capability table 
Related-To: NEO-12138

Signed-off-by: Tomasz Biernacik <tomasz.biernacik@intel.com>
 2024-10-17 14:46:19 +02:00
Maciej Plewka
deb27d0363 fix: align thread group count to fit within dss 
Related-To: NEO-12133
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2024-10-16 18:34:39 +02:00
Bartosz Dunajski
52e9a6e07f feature: Initial CB events IPC support 
Related-To: NEO-11925

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2024-10-16 13:33:59 +02:00
Compute-Runtime-Validation
2098e64dc1 Revert "feature: adding support for custom compiler backends" 
This reverts commit 8098bcc48d.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-10-16 02:07:25 +02:00
Jitendra Sharma
9bd4878841 feature: update GRF register implementation 
Related-To: NEO-8314
Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
 2024-10-15 13:47:34 +02:00
Bartosz Dunajski
acef3a1e71 feature: pass external device allocation to CB event 
Related-To: NEO-11925

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2024-10-15 09:37:59 +02:00
Chodor, Jaroslaw
8098bcc48d feature: adding support for custom compiler backends 
This adds abbility to load different versions of the backend
compiler based on underlying device.

Related-To: NEO-12747

Signed-off-by: Chodor, Jaroslaw <jaroslaw.chodor@intel.com>
 2024-10-14 18:23:11 +02:00
Szymon Morek
7f2b806413 fix: Override timestamp width from KMD 
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2024-10-14 13:38:33 +02:00
Wojciech Konior
8a6626da23 refactor: two engineInstanced-methods removed 
Related-To: NEO-12594

Signed-off-by: Wojciech Konior <wojciech.konior@intel.com>
 2024-10-11 18:34:06 +02:00
Mateusz Jablonski
3c06b316e6 refactor: remove legacy code 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-10-10 09:54:22 +02:00
Mateusz Hoppe
31265edfee fix: program RenderTargetCacheFlush in PC prior to PIPELINE_SELECT 
- fix code by removing csStallOnly that skipped seeting RTCF flag

Related-To: NEO-9194

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2024-10-09 16:59:43 +02:00
Wojciech Konior
6b40f9bc5a refactor: engineInstancedType removed 
Related-To: NEO-12594

Signed-off-by: Wojciech Konior <wojciech.konior@intel.com>
 2024-10-09 16:30:48 +02:00
Mateusz Hoppe
5ae2552b4b fix: track shifted contextIds in bitset in bindlessHeapsHelper 
- bitset is 64 bit in size, context ids may go beyond that limit
when multiple devices are available
- this change subtracts contextId of first context for a given root
device - tracked state dirty contexts ids are now zero-based

Resolves: GSD-10025

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2024-10-09 10:32:29 +02:00
Mateusz Jablonski
552930a75f fix: don't setup preemption surface when debugger is active 
Related-To: NEO-12878
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-10-08 13:58:11 +02:00
Katarzyna Cencelewska
42ca656edb fix: change logic to calculate available thread count 
don't use magic number, value depend on grf size

Related-To: HSD-18039369782
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2024-10-07 15:46:33 +02:00
Dominik Dabek
6d6c4267b3 performance: enable indirect detection 
Platforms other than PVC require detection version >= 4
Vector compiler kernels require >= 6

Related-To: NEO-12491

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-10-07 14:38:22 +02:00
Bartosz Dunajski
9a280892f8 refactor: add timestamps to xe logs 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2024-10-07 11:42:55 +02:00
Filip Hazubski
388c7dc591 fix: Update SyncBuffer size calculation 
Add a constant to describe minimal size of SyncBuffer object.

Related-To: HSD-18039952263, HSD-18039940553, HSD-18039937640

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2024-10-03 15:57:24 +02:00
Compute-Runtime-Validation
31618d9e18 Revert "fix: add workaround for incorrect DRM system info" 
This reverts commit 7ac991fa3f.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-10-03 15:22:21 +02:00
Mateusz Jablonski
14c8f1f15d refactor: remove not used function 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-10-02 16:14:40 +02:00
Mateusz Jablonski
9819b1e2e4 refactor: remove not needed flag ftrGpGpuMidThreadLevelPreempt 
the flag was used for mid thread preemption support on pre-gen12 platforms

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-10-01 12:52:12 +02:00
Mateusz Jablonski
9db83b8231 refactor: unify isMidThreadPreemptionSupported function 
mid thread preemption can be enabled only by ftrWalkerMTP flag
pre-Xe2 devices doesn't support MTP

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-10-01 11:26:04 +02:00
Filip Hazubski
72cf384c7d refactor: Fix typo 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2024-10-01 09:31:02 +02:00
Compute-Runtime-Validation
ef1b569a85 Revert "performance: Do not create global fence allocation on integrated" 
This reverts commit 6bf5183eff.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-10-01 08:14:39 +02:00
Lukasz Jobczyk
6bf5183eff performance: Do not create global fence allocation on integrated 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-09-30 13:13:27 +02:00
Compute-Runtime-Validation
6cb0e45330 Revert "performance: Do not create global fence allocation on integrated" 
This reverts commit 50eb6af9ac.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2024-09-27 11:48:01 +02:00
Lukasz Jobczyk
50eb6af9ac performance: Do not create global fence allocation on integrated 
Resolves: NEO-12324

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-09-27 09:32:42 +02:00
Lukasz Jobczyk
c93998bcb9 performance: Do not program additional synchronization on integrated 
Related-To: NEO-12324

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2024-09-26 10:54:31 +02:00
Mateusz Hoppe
8000133b2a refactor: add method to adjust regular context count 
Related-To: NEO-12258

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2024-09-25 13:46:46 +02:00
Maciej Plewka
80f75ceace fix: submit dummy exec to pin memory during zeContextMakeMemoryResident call 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2024-09-23 14:43:59 +02:00
Bartosz Dunajski
d7ce841081 fix: InOrderExecInfo upload to tbx 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2024-09-20 16:03:09 +02:00
Mateusz Hoppe
4a068c8eab fix: correclty program StateBaseAddress in global bindless mode 
- prepare bindful ssh when kernel requires ssh heap and
SurfaceStateBaseAddress
- remove lastAppendedKernelBindlesMode - local ssh heap may be needed
for bindless kernels with scratch or misaligned buffer args
- use ssh heap gpu address to program SurfaceStateBaseAddress, global base is
used for BindlessSurfaceState and DynamicState

Related-To: NEO-7063

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2024-09-20 11:57:05 +02:00
Filip Hazubski
ebc19b4a70 feature: Add logic to disable bindless addressing via AIL 
Add mockable Device functions to get ReleaseHelper and AILConfiguration.

Resolves: NEO-12699

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2024-09-18 13:49:51 +02:00
Jitendra Sharma
25f2504bf5 fix: set eudebug extension property when debugging enabled 
In order to debug on XE, XE_EXEC_QUEUE_SET_PROPERTY_EUDEBUG
needs to be set up.

Related-To: NEO-12691
Signed-off-by: Jitendra Sharma <jitendra.sharma@intel.com>
 2024-09-18 08:32:03 +02:00
Zbigniew Zdanowicz
6e0aa1781c refactor: modify kernel helper method to pass kernel data directly 
Related-To: NEO-12639

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2024-09-16 16:25:13 +02:00
Mateusz Jablonski
78604bd475 refactor: remove not needed code 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-09-16 12:12:43 +02:00
Dominik Dabek
3bd2befe74 refactor: indirect detection helpers, VC 
Allow for different required version for VC compiled kernels.
Define constant for detection disabled.

Related-To: NEO-12491

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-09-13 19:42:57 +02:00
Dominik Dabek
571d703135 refactor: indirect detection helpers 
Check indirect detection version from igc header for JIT.
Move required version to its own method.

This allows for different required versions per platform.

Related-To: NEO-12491

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2024-09-11 14:49:54 +02:00
Zbigniew Zdanowicz
7ce4a8adc2 performance: replace virtual calls with native class methods 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2024-09-11 11:10:40 +02:00
Fabian Zwoliński
ea5b586c37 fix: move pathExists out of sys calls and do not mock it 
Moved pathExists from SysCalls to path.h.
In ULTs, use unchanged pathExists and mock stat, getFileAttributesA instead.
Add Windows and Linux ULTs for pathExists.

Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
 2024-09-10 19:24:45 +02:00
Mateusz Hoppe
a6bf424417 refactor: determine hp copy engine once after gfx core helper is created 
- do not determine engine on every call to getDefaultHpCopyEngine()

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2024-09-10 10:00:48 +02:00
Wenbin Lu
7ac991fa3f fix: add workaround for incorrect DRM system info 
Related-To: NEO-9489

Signed-off-by: Wenbin Lu <wenbin.lu@intel.com>
 2024-09-10 08:48:01 +02:00
Filip Hazubski
7d16521c7b performance: Correct alignment checks 
Only use checks in debug builds.

Resolves: HSD-18039597713

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2024-09-10 08:43:36 +02:00
Mateusz Jablonski
54bda0e986 fix: In Linux CL/GL sharing 
- always issue flush request before export

Apparently it's expected to flush the object (which might convert them
from one format to another for export, or remove aux buffer uses or
anything not supported by export).

- use modifier to select tiling mode

Previously we just assumed that whatever tiling mode was picked by mesa
will match the one picked by GMMLIB but that's not always the case
and in particular on Arc and Xe it doesn't work ... Mesa picks Tile4
and GMMLIB picks Tile64 ...

Fixes: #761
Fixes: #736

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2024-09-06 21:40:18 +02:00
Fabian Zwoliński
38e1614f4a fix: create and use new allocation type for syncBuffer 
Related-To: NEO-11533
Related-To: HSD-18039788811
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
 2024-09-06 14:11:33 +02:00
Kamil Kopryk
95b035a071 fix: global stateless heap creation in heapless path 
Related-To: NEO-10681
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2024-09-05 16:56:00 +02:00
Andrzej Koska
b0e7a11e9a refactor: Improving information transfer about the copy engine 
Related-To: NEO-11934

Signed-off-by: Andrzej Koska <andrzej.koska@intel.com>
 2024-09-05 16:11:52 +02:00