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176 Commits

Author SHA1 Message Date
Compute-Runtime-Validation
f5575a1370 Revert "Remove fallback path for PAT index programming" 
This reverts commit faf8d51f6d.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-09-23 20:46:31 +02:00
Dunajski, Bartosz
faf8d51f6d Remove fallback path for PAT index programming 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-09-21 10:46:43 +02:00
Krystian Chmielewski
1f6c09ba1d zebin: sanitize scratch space size 
Sanitize scratch space size to value programmable on GPU.

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
 2022-09-09 11:50:09 +02:00
Zbigniew Zdanowicz
f656707fc0 Use hardware support flags for state compute mode state changes 
Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-08-25 18:46:37 +02:00
Patryk Wrobel
60451b590d Perform deep-copy of helper's name 
Signed-off-by: Patryk Wrobel <patryk.wrobel@intel.com>
 2022-08-23 16:42:40 +02:00
Dunajski, Bartosz
595cfebaef Refactor PIPE_CONTROL programming 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-08-23 13:55:25 +02:00
Rafal Maziejuk
d36a383a84 Delete redundant matchers and use common matchers instead 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2022-08-17 13:54:15 +02:00
Rafal Maziejuk
af91f94098 Improve calculateAvailableThreadCount implementation 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2022-07-28 11:43:14 +02:00
Dunajski, Bartosz
a3903c385e Remove HW types from synchronization interface 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-07-25 13:59:26 +02:00
Compute-Runtime-Validation
9c45ced969 Revert "Enable FlushTask for Gen12LP" 
This reverts commit 7829364e67.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2022-07-21 19:27:55 +02:00
Aravind Gopalakrishnan
7829364e67 Enable FlushTask for Gen12LP 
Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
 2022-07-20 11:29:51 +02:00
Bartosz Dunajski
52b00a11b0 Remove LSH from CommandQueue 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-07-19 08:47:02 +02:00
Artur Harasimiuk
e245523730 per gen/per sku TEST_F/TEST_P refactor 
In gen/sku specific tests include only required files to reduce
dependency on not related HW scpecific headers and improve build
performance.
This is achieved by reduce in usage of hw_test.h and related collateral,
like shared/source/helpers/definitions/hw_cmds.h which can be replaced
by sku specific hw_cmds_<sku>.h

Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2022-07-06 23:13:46 +02:00
Kamil Kopryk
efa19a0b18 Simplify code - reverse helper function logic to avoid not needed negation 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-06-29 09:19:33 +02:00
Bartosz Dunajski
2c853adac3 Use LogicalStateHelper to program ComputeMode 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-06-27 15:25:55 +02:00
Michal Mrozek
ef7c1c22cb Rename function name to avoid confusion. 
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2022-06-14 18:50:39 +02:00
Bartosz Dunajski
939d109362 Add LogicalStateHelper class 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-06-14 16:57:16 +02:00
Artur Harasimiuk
6d43e96dee style: configure readability-identifier-naming.ClassCase 
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2022-06-13 18:02:39 +02:00
Katarzyna Cencelewska
96e1eb7467 Move variables baseDieRev and baseDieA0Masked from xe_hpc to pvc 
Pvc specific variables should be located in pvc struct

Related-To: NEO-6738
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-05-17 12:19:16 +02:00
Artur Harasimiuk
819e0f5515 style: configure readability-identifier-naming.LocalVariableCase 
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2022-05-16 12:39:44 +02:00
Bartosz Dunajski
f8ce86b116 XE_HPC: Fallback path to fix PAT_INDEX programming 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-05-05 15:06:21 +02:00
Zbigniew Zdanowicz
819d648997 Use single event for multiple kernels 
Related-To: NEO-6871

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-04-28 15:10:04 +02:00
Filip Hazubski
55dcca993c Apply getPaddingForISAAllocation PVC implementation to PVC and later platforms 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-04-27 15:55:39 +02:00
Krzysztof Gibala
9b778863b4 Store GmmHelper in Gmm class 
Store GmmHelper in Gmm class instead of GmmClientContext

Related-To: NEO-6523
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2022-04-27 15:45:49 +02:00
Krystian Chmielewski
ee0d183cf9 Handle legacy hasBarriers properly 
Previous change regarding NEO-6785 added encoding of number of barriers
to specific value representation depending on hardware that we program for.

In patch token format encoding of number of barriers is sent via
hasBarriers field in a token.
In zebin true number of barriers is sent via barrier_count field in
zeInfo.

To remove this discrepancy, translate encoded number of barriers into
true number of barriers in legacy format.

Resolves: NEO-6785

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
 2022-04-12 09:44:10 +02:00
Krystian Chmielewski
2c1bfbb5b2 Encode number barriers 
When programming number of barriers use BARRIER_SIZE enumeration.
Resolves: NEO-6785

Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
 2022-04-08 10:32:23 +02:00
Filip Hazubski
d2462ff8fb Add debug flag to control ISA allocation padding 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-04-04 15:12:30 +02:00
Zbigniew Zdanowicz
9858438121 Limit multiple partition count to compute command lists 
Related-To: NEO-6811

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-03-29 07:29:08 +02:00
Konstanty Misiak
174c27eb31 Fix CFEFusedEUDispatch debug flag 
Signed-off-by: Konstanty Misiak <konstanty.misiak@intel.com>
 2022-03-28 12:32:05 +02:00
Artur Harasimiuk
2c16ac9355 code cleanup 
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2022-03-21 10:51:43 +01:00
Aravind Gopalakrishnan
16f2fbbc37 [9/n] L0 immediate commandlist improvements 
Add HwInfo utility for more fine-grained flush task enablement
Related-To: LOCI-1988

Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
 2022-02-18 19:51:28 +01:00
Aravind Gopalakrishnan
74cdd60255 [7/n] L0 immediate commandlist improvements 
Enable flushTask only for specific families for now

Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com>
 2022-02-15 18:43:30 +01:00
Bartosz Dunajski
a95198521e Initial implementation of CacheSettingsHelper 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-02-08 16:18:06 +01:00
Bartosz Dunajski
c88fce0def Gmm construction cleanup 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-02-08 10:20:24 +01:00
Bartosz Dunajski
4b0d986876 Move AllocationType enum out of GraphicsAllocation class 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-02-04 17:49:09 +01:00
Maciej Plewka
9d8ce7aace Command container appends BB_END on cmd buffer allocation end 
When linear stream created for command container has not enough space
for command and BB_END it will program BB_END and allocate new command
buffer allocation. Pointer returned from getSpace in this case will
return storage from new command buffer allocation.

Related-To: NEO-5707

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2022-01-31 16:15:37 +01:00
Igor Venevtsev
d9aae805c7 Do not apply L0 debugger WA (Disable L3 cache) for highest DG2 steppings 
Related-To: NEO-6320

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2022-01-17 13:46:40 +01:00
Filip Hazubski
5be4d89b73 Rename function 
Rename MemorySynchronizationCommands::isDcFlushAllowed
to MemorySynchronizationCommands::getDcFlushEnable

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-30 17:03:22 +01:00
Maciej Plewka
615688336f Program all fields in SCM 
Related-To: NEO-6432

This change applies WA that always programs all fields in SCM for
gen12lp. Also for those platforms Force Non-Coherent is set to 0x2.

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2021-12-28 16:30:47 +01:00
Mateusz Jablonski
896e01c1cb Require exact revision when getting binary builtin for PVC 
this change also implements logic for recompilation of builtin from spv in L0
in case when binary resource is not available


Related-To: NEO-6170
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-12-22 19:56:54 +01:00
Filip Hazubski
f4c151cce5 Refactor PipeControlArgs struct 
Remove struct PipeControlArgsBase

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-22 17:13:16 +01:00
Filip Hazubski
0fd685541d Add isDcFlushAllowed function to HwInfoConfig 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-21 18:29:43 +01:00
Filip Hazubski
6d439f88bb Explicitly set dcFlushEnable value 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-21 12:21:11 +01:00
Igor Venevtsev
fe250d99b1 Disable L3 caches for debug on ATS and DG2 
Resolves: NEO-6320

Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com>
 2021-12-14 13:59:09 +01:00
Bartosz Dunajski
d07c76c237 unTypedDataPortCacheFlush pipe_control helper support 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-12-09 13:00:10 +01:00
Milczarek, Slawomir
b16438de56 Add regkey to override MOCS index in surface state for scratch space 
Introduce the debug regkey OverrideMocsIndexForScratchSpace
to control MOCS index in surface state for scratch space

Related-To: NEO-6509

Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2021-12-07 16:27:33 +01:00
Bartosz Dunajski
dfdd3c597a Remove redundant BUFFER_COMPRESSED allocation type 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-12-07 13:35:49 +01:00
Bartosz Dunajski
68aea5bf62 Rename compression flags and helpers 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-12-03 18:09:02 +01:00
Bartosz Dunajski
995cb88bfa Improve ftr/wa flags packing 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-11-25 16:05:57 +01:00
Zbigniew Zdanowicz
36fd163837 Refactor pipe control post sync operations 
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-11-10 08:53:03 +01:00