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116 Commits

Author SHA1 Message Date
Daria Hinz
6566eb3193 Move Linear Stream to core folder 
Change-Id: I962ebd6e9075fcab9d7b6211524093109e62d382
Signed-off-by: Daria Hinz <daria.hinz@intel.com>
 2019-08-26 17:00:53 +02:00
Mrozek, Michal
f362739521 Refactor L3 programming. 
- Do not do it via member setting.
- Utilize DispatchFlags

Change-Id: I75d4c8ea6c1e10ca0edeeb0d1c3883a549c1cb1f
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-08-23 08:46:27 +02:00
Krzysztof Gibala
ba9c21cf82 Refactor functions 
Use unified access pattern in obtainPipeControlAndProgramPostSyncOperation
Rename getExecutionEnvironment to peekExecutionEnvironment

Related-To: NEO-3210
Change-Id: Iedf30833704e2fc4b8822f5d19d36a230f140f27
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2019-08-19 12:19:18 +02:00
Krzysztof Gibala
62b0f0a220 Refactor addPipeControlWA, PipeControlWArequired 
Related-To: NEO-3210
Change-Id: I0516154b323e29eeb697bf2253ca08ae1ce150d8
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2019-08-19 10:47:28 +02:00
Jim Snow
4360aff03c Move runtime/helpers/aligned_memory.h to core/helpers 
Signed-off-by: Jim Snow <jim.m.snow@intel.com>
Change-Id: I15de094c51d4eb18bfff4d17fd34e817b5525fda
 2019-08-06 23:56:24 +02:00
Mrozek, Michal
a38e9da034 Optimize marker call in blocked scenarios. 
- Do not emit batch buffer
- obtain completion stamp directly from csr

Change-Id: I7ff58f2f019ee8158665f6fb93682ce5aae17bd6
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-07-10 11:01:49 +02:00
Piotr Maciejewski
d1d794c658 Metrics Library Performance Counters implementation. 
Signed-off-by: Piotr Maciejewski <piotr.maciejewski@intel.com>
Change-Id: I0f00dca1892f4857baaebc75ba2208a4f33db1bf
 2019-07-04 15:56:47 +02:00
Daria Hinz
42b87654eb Add preemption allocation for each of the Csr 
Change-Id: Id14fbfbf6e9a6a85f035e75b4a20ca198c0996e5
Signed-off-by: Hinz <daria.hinz@intel.com>
 2019-07-03 08:17:38 +02:00
Dunajski, Bartosz
41cca6d790 Use GraphicsAllocation for blit operation instead of Buffer object 
Change-Id: I7e59a25db97082a6396d441a8fa603df27d6424d
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
Related-To: NEO-3020
 2019-07-01 11:23:27 +02:00
Mateusz Jablonski
27f3f8ea8f Pass private scratch size to scratch space controller 
Related-To: NEO-3190

Change-Id: I6f1e71481679492516d898226de6a1e721896e81
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2019-06-28 14:32:06 +02:00
Dunajski, Bartosz
56e77ca452 Add BlitProperties to simplify properties passing 
Change-Id: I4abf99d420487a237e5b465b9d4d121121f45a84
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
Related-To: NEO-3020
 2019-06-27 16:31:40 +02:00
Dunajski, Bartosz
3e88907201 Enqueue Read/Write operations with blitter 
- Program dependencies from Event and IOQ
- Obtain new TimestampPacket
- Update output TimestampPacket if needed

Change-Id: I4ad020f5c5b05ceca8b096fafe1257523e2bc343
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
Related-To: NEO-3020
 2019-06-17 12:01:37 +02:00
Filip Hazubski
74a8406cb8 Support offsets in blitWithHostPtr 
Related-To: NEO-3020

Change-Id: I8476cc80311495bb16324d1fe8427a77c2e04556
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-06-05 13:07:44 +02:00
Milczarek, Slawomir
8e210941f8 AUB subcapture to work with multi CSRs 
Related-To: NEO-2747

Change-Id: I2149cafb59bd1a6374da140e3f7e76a4cb3bb417
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-06-05 10:52:05 +02:00
Dunajski, Bartosz
c8c2e64ec6 Add blocking flag for bliter operations 
Change-Id: I61f672780c2108961eaed40b5d5be257f3c34566
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-06-04 21:39:43 +02:00
Filip Hazubski
befbffc967 Support offsets in blitter 
Related-To: NEO-3020

Change-Id: I7ce13f0cf890c47fd40e92b5bb20c4f4ce291653
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-06-04 16:16:37 +02:00
Zbigniew Zdanowicz
7390e456a4 Add getter of Scratch Controller to the CommandStreamReceiver class 
Change-Id: Iba0a9d7e4a9f141e1e31de428d50e7c745ad993a
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2019-05-21 17:25:05 +02:00
Dunajski, Bartosz
b82cdd6b8e Program MI_SEMAPHORE_WAIT for dependencies during blit operations 
Change-Id: I8b0e467886bfb23d026a0c13be514343a22a20a1
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-05-21 14:18:16 +02:00
Koska, Andrzej
fa3d4f39f4 Enabling clEnqueueSVMMemcpy between SVM and host pointer 
Related-To: NEO-3011
Change-Id: I89aad599d7238ea2d319a4b1c72dffea2dba952b
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
 2019-05-20 09:10:56 +02:00
Dunajski, Bartosz
4f4ef14b9b Accept different copy directions during blit operations 
Change-Id: Idb59458b46337ca0095056857dbd75bf116b6723
Related-To: NEO-3020
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-05-16 18:53:30 +02:00
Mrozek, Michal
bc35cd250a Do not use max power saving mode in VA sharing scenarios. 
-This can be achieved by passing CL_QUEUE_THROTTLE_LOW_KHR as throttle hint
to command queue.
- This gives much better control about the granularity of this feature
instead of triggering this for the whole context user may still have
power saving mode queues.

Change-Id: I066729f963119ddc1f62ad2785c342af2fea588e
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
 2019-05-07 15:23:13 +02:00
Milczarek, Slawomir
20e0d8c7ab Add flag to control Binding Table Base Address programming 
Related-To: NEO-2747

Change-Id: I30b52875f37b4f75a0b63eb199fc388d1e495dec
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-04-29 14:28:19 +02:00
Maciej Dziuban
b7bd3aa793 Defer makeCoherent call to blocking calls 
This allows flush() not to be blocking while using TBX

Resolves: NEO-3054
Change-Id: Ib3a408d4b5ec66f0848572841b3c60785fc28ad9
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-04-23 10:16:43 +02:00
Piotr Fusik
745c20c78a Rename TimestampPacket to TimestampPacketStorage. 
Related-To: NEO-2872

Change-Id: Id1f78491912c44890ae7ead2cac12ec8eb073628
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-04-16 15:34:28 +02:00
Dunajski, Bartosz
e40a82336c Flush constructed Blitter command buffer 
Related-To: NEO-3020

Change-Id: Ib5f4e111b3a64964ff2c79d4c057a616cdbf8d07
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-04-16 09:55:53 +02:00
Dunajski, Bartosz
ccd93e1ea8 Add method to dispatch blit operation from hostPtr to Buffer 
Related-To: NEO-3020

Change-Id: If76f2c659c3ee343693a6d3ced86a47d7ed0bf61
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-04-10 15:17:44 +02:00
Milczarek, Slawomir
17493426c1 AUB CSR with a capability to add AUB comment 
Change-Id: Ia7e85468c3f1e937d34b67b0e279c013e8e3c190
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-04-01 14:14:58 +02:00
Maciej Dziuban
377aebce06 Move PIPE_CONTROL related functions to PipeControlHelper 
Change-Id: Ie8220b06d2aa35a9fd0083b7db6925b577564d36
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-04-01 09:20:28 +02:00
Filip Hazubski
9bbf1daa0e Update CommandStreamReceiver::expectMemory() 
Change-Id: I3362f8beee2430f2bf5ff797ec804448682e41ea
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-03-29 08:52:02 +01:00
Maciej Plewka
9e52684f5b Change namespace from OCLRT to NEO 
Change-Id: If965c79d70392db26597aea4c2f3b7ae2820fe96
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2019-03-26 15:48:19 +01:00
Stefanowski, Adam
16aee8cc46 [2/n] Move Hardware Info to Execution Environment 
- remove hwInfo from the csr functions where it was passed as a parameter,
now csr functions have access to hwInfo by Execution Environment

Change-Id: I756ae63d9728c9c963571147bab97f9e1c15797b
Signed-off-by: Adam Stefanowski <adam.stefanowski@intel.com>
 2019-03-22 10:08:26 +01:00
Milczarek, Slawomir
a3369a9679 AUB dump with HW mode to call pollForCompletion 
Change-Id: I9a4345c47394f19ecc63e2d598266e0889a6f8f0
Signed-off-by: Milczarek, Slawomir <slawomir.milczarek@intel.com>
 2019-03-18 17:59:05 +01:00
Piotr Fusik
ec72787b98 Remove MemoryManager::allocateGraphicsMemoryForHostPtr. 
Change-Id: I629f2299a183fc135135dbaff89216b966554a95
Signed-off-by: Piotr Fusik <piotr.fusik@intel.com>
 2019-03-12 15:51:32 +01:00
Jobczyk, Lukasz
878fd43a1a Reverse logic of creating Memory Manager - part 1 
-remove CSR::createMemoryManager method
-create MM from platform before creating devices

Change-Id: I0e7f091c53b0e60ae7101e82a305253af626330e
Signed-off-by: Jobczyk, Lukasz <lukasz.jobczyk@intel.com>
 2019-03-08 09:47:29 +01:00
Maciej Dziuban
fb78677d8d Add function for ensuring command buffer has allocation with given size 
CommandStreamReceiver::ensureCommandBufferAllocation

Change-Id: Icb48c9beff4f087addda75e97b90d86e8481e7ff
Signed-off-by: Maciej Dziuban <maciej.dziuban@intel.com>
 2019-03-04 09:39:00 +01:00
Filip Hazubski
8b57d28116 clang-format: enable sorting includes 
Include files are now grouped and sorted in following order:
1. Header file of the class the current file implements
2. Project files
3. Third party files
4. Standard library

Change-Id: If31af05652184169f7fee1d7ad08f1b2ed602cf0
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-27 11:50:07 +01:00
Jablonski, Mateusz
798137e4bb Add function to create devices bitfield based on allocation properties 
Change-Id: Ic70443b1fb6106186efcff318690e434dc1db625
Signed-off-by: Jablonski, Mateusz <mateusz.jablonski@intel.com>
 2019-02-26 12:07:09 +01:00
Kamil Diedrich
76276d4c23 Add unit test for events 
Change-Id: I13d74626a244d234a5bbaff369ed09fb59d6e33f
 2019-02-14 12:42:44 +01:00
Filip Hazubski
d30cc221df Update disabling caching for a resource 
Change-Id: I00eac0add01f75a1b82d04cf42652c15b776a457
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-02-01 10:50:21 +01:00
Filip Hazubski
ec03210687 Update clEnqueueVerifyMemory 
- return success also for non aub CSRs

Change-Id: Iac7fdcd58e4b76a325ef67fd266f183d779ca956
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-14 14:37:09 +01:00
Dunajski, Bartosz
8ae7de7b0e Create HardwareContext only when osContext is available 
Change-Id: I8bcf2cb20f0e1e6b9da98b477f5be206407a7a57
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2019-01-13 15:12:07 +01:00
Filip Hazubski
7e3884e22d Add clEnqueueVerifyMemory API 
Change-Id: I15a514b14b9efdaeb182c7abd98b8e236932d50f
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2019-01-04 08:30:02 +01:00
Dunajski, Bartosz
010e1a4738 VFE state programming cleanup 
Change-Id: I38fb47b00211a1d28244369ac417427ada145f61
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-13 17:44:40 +01:00
Dunajski, Bartosz
b728526c4e Allow Device creating multiple CSRs [8/n] 
Use OsContextId instead of DeviceIndex for residency

Change-Id: Ib2367b32b5b3e320252d8254f1042f1c3d497068
 2018-12-04 15:36:59 +01:00
Zdanowicz, Zbigniew
7dbd0ea4f3 Move Scratch Space functionality to dedicated class 
Change-Id: Ic7655c4b971513961aba6823478a139ffc943466
 2018-11-29 11:55:56 +01:00
Dunajski, Bartosz
3e7fa3754c Replicate OsContext to CommandStreamReceiverWithAUBDump 
Change-Id: If2f83d01d58891209c6cf82f47e5634f8d348de4
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-28 13:11:52 +01:00
Dunajski, Bartosz
b0de2a11d2 Set OsContext as reference 
Change-Id: I3b682fabde9c2ddb2c33a95aef77bf6ce400a21f
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-27 15:32:14 +01:00
Piotr Fusik
87bb6afa56 Move stamps allocators from memory manager to CSR. 
Change-Id: Ib399e462cdddad89fcc470df4c4f0f5e4591a6b2
 2018-11-27 14:52:06 +01:00
Dunajski, Bartosz
2d77b86e70 Allow Device creating multiple CSRs [5/n] 
- Move Engine type to OsContext
- Move OsContext to CSR
- Improve EngineMapper logic
- CompletionStamp cleanup

Change-Id: I935cb7169c8c48cd09837e20e3da06f6dd3437b9
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-27 14:25:04 +01:00
Dunajski, Bartosz
d6870a896b Reduce tag pool size to 1 for AUBs 
Change-Id: I3a3513250b10e899795e149bff2739193a725f84
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-20 11:42:32 +01:00