intel/compute-runtime
1
0
Fork 0
mirror of https://github.com/intel/compute-runtime.git synced 2025-12-30 09:58:55 +08:00
Code Issues Packages Projects Releases Wiki Activity
20,230 Commits 42 Branches 655 Tags
87a35bd68021961b4a29bb522b6b8ecb86cf55ea
Commit Graph

7279 Commits

Author SHA1 Message Date
Filip Hazubski
87a35bd680 feature: Add helper function to adjust product config 
Related-To: NEO-15318

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2025-08-11 12:24:03 +02:00
Michal Mrozek
9c3904583b performance: improve container lookup 
- check if incoming pointer is page aligned, if so do non offset based lookup
- make allowOffset compile time parameter
- in case non offset based lookup fails, re-try with offset allowed

Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2025-08-09 10:01:38 +02:00
Radoslaw Jablonski
59c3b06eea refactor: xe topology 
Signed-off-by: Radoslaw Jablonski <radoslaw.jablonski@intel.com>
 2025-08-08 15:31:13 +02:00
Zbigniew Zdanowicz
092f2bb333 feature: get command list information for in order noop data 
Related-To: NEO-15376

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2025-08-08 15:01:52 +02:00
Radoslaw Jablonski
c2d64cae6a refactor: queryDeviceCaps ioctl 
Signed-off-by: Radoslaw Jablonski <radoslaw.jablonski@intel.com>
 2025-08-08 14:43:23 +02:00
Dominik Dabek
8ef0648fe7 performance: enable usm reuse, l0 xe3 
Re-enable after fix for external host ptr mem copy.

Related-To: NEO-15663

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2025-08-08 14:15:51 +02:00
Aleksander Czerwionka
6bc9ea3ddb feature: move svmAllocsManager and staggingBufferManager to platform 
Related-To: NEO-13247

Signed-off-by: Aleksander Czerwionka <aleksander.czerwionka@intel.com>
 2025-08-08 14:01:44 +02:00
Dominik Dabek
77470acf7a fix: l0, tag update on mem copy ext host ptr 
Require tag update on mem copy with external host ptr.
Without this, temporary allocation might not be cleaned before next copy
operation.
If a second copy operation is passed same ptr that has been reallocated,
there will be a pagefault.

Related-To: NEO-15663

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2025-08-08 12:42:53 +02:00
Compute-Runtime-Validation
04f7664242 Revert "performance: disable tlb flush on LNL Windows" 
This reverts commit 495b9eccd3.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-08-08 09:14:01 +02:00
Compute-Runtime-Validation
b7472fa76f Revert "refactor: queryDeviceCaps ioctl" 
This reverts commit 3117d2d2cb.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-08-08 07:05:24 +02:00
Compute-Runtime-Validation
1b3fa0801d Revert "performance: disable tlb flush on LNL Linux" 
This reverts commit a6fe012b6a.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-08-08 02:57:28 +02:00
Compute-Runtime-Validation
964b84f484 Revert "performance: disable tlb flush on BMG Windows" 
This reverts commit 3ffb51932f.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-08-08 02:41:48 +02:00
Chodor, Jaroslaw
b612301b72 feature: Adding support for empty .text section 
If .text section is empty then ignore it.

Related-To: NEO-12229

Signed-off-by: Chodor, Jaroslaw <jaroslaw.chodor@intel.com>
 2025-08-07 20:15:37 +02:00
Radoslaw Jablonski
e190e1b8ec fix: use relative subslice mapping indices in Xe DRM 
This aligns behavior with i915 and L0 spec.

Signed-off-by: Radoslaw Jablonski <radoslaw.jablonski@intel.com>
 2025-08-07 15:58:48 +02:00
Radoslaw Jablonski
9ec004ba59 fix: don't resolve MaxEuPerSubSlice from Xe topology 
All Xe platforms should provide MaxEuPerSubslice through System Info,
so there is no need to resolve it from topology.

Signed-off-by: Radoslaw Jablonski <radoslaw.jablonski@intel.com>
 2025-08-07 15:48:19 +02:00
Lukasz Jobczyk
f7ed43c454 performance: disable tlb flush on BMG Linux 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-08-07 12:11:02 +02:00
Lukasz Jobczyk
3ffb51932f performance: disable tlb flush on BMG Windows 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-08-07 12:04:26 +02:00
Lukasz Jobczyk
495b9eccd3 performance: disable tlb flush on LNL Windows 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-08-07 11:35:46 +02:00
Lukasz Jobczyk
a6fe012b6a performance: disable tlb flush on LNL Linux 
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-08-07 11:28:21 +02:00
Compute-Runtime-Validation
917032f2ac Revert "feature: dump graph visualisation" 
This reverts commit 86d270633c.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-08-07 10:12:20 +02:00
Compute-Runtime-Validation
b40830c1e6 Revert "fix: MaxSubSlicesSupported should be set to total non-fused count" 
This reverts commit ee0022d234.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-08-07 02:15:20 +02:00
Ben Ashbaugh
3f1f3697ba feature: update cl_intel_unified_shared_memory to revision 1.2 
Related-To: NEO-15644

Signed-off-by: Ben Ashbaugh <ben.ashbaugh@intel.com>
 2025-08-06 21:33:30 +02:00
Naklicki, Mateusz
86d270633c feature: dump graph visualisation 
Related-To: NEO-15377
Signed-off-by: Naklicki, Mateusz <mateusz.naklicki@intel.com>
 2025-08-06 17:14:50 +02:00
Lukasz Jobczyk
4df323aca7 fix: disable async builtin init xe2 and later 
Resolves: GSD-11426, GSD-11378, GSD-11424

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-08-06 12:56:34 +02:00
Chandio, Bibrak Qamar
47caeda487 feature: Support for pStart 
Related-To: NEO-15156, GSD-9939

Support for start address hint in zeVirtualMemReserve.

If it fails to find pStart then it defaults to the base line
allocateWithCustomAlignment(...)

Signed-off-by: Chandio, Bibrak Qamar <bibrak.qamar.chandio@intel.com>
 2025-08-06 12:40:29 +02:00
Radoslaw Jablonski
3117d2d2cb refactor: queryDeviceCaps ioctl 
Signed-off-by: Radoslaw Jablonski <radoslaw.jablonski@intel.com>
 2025-08-06 12:22:03 +02:00
Brandon Yates
ee0022d234 fix: MaxSubSlicesSupported should be set to total non-fused count 
Related-to: HSD-18042764574

Signed-off-by: Brandon Yates <brandon.yates@intel.com>
 2025-08-06 12:09:36 +02:00
Tomasz Biernacik
28ca00fa1b feature: adjust max threads per EU count 
Related-To: NEO-14998

Signed-off-by: Tomasz Biernacik <tomasz.biernacik@intel.com>
 2025-08-06 09:02:54 +02:00
Compute-Runtime-Validation
c9456cda14 Revert "feature: Support for pStart" 
This reverts commit a50c0dbecf.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
 2025-08-06 02:26:13 +02:00
Bartosz Dunajski
cc01c35501 feature: use dedicated cmd lists for bcs split 
Related-To: NEO-14557

Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2025-08-05 10:49:11 +02:00
Szymon Morek
d7151714e8 fix: make misaligned userptr 2-way coh on PTL 
Related-To: NEO-15295

Signed-off-by: Szymon Morek <szymon.morek@intel.com>
 2025-08-05 10:27:44 +02:00
Chandio, Bibrak Qamar
a50c0dbecf feature: Support for pStart 
Related-To: NEO-15156, GSD-9939

Support for start address hint in zeVirtualMemReserve.

If it fails to find pStart then it defaults to the base line
allocateWithCustomAlignment(...)

Signed-off-by: Chandio, Bibrak Qamar <bibrak.qamar.chandio@intel.com>
 2025-08-05 10:14:01 +02:00
Zbigniew Zdanowicz
841267ecbd feature: save command buffer gpu address for front end command in command list 
Related-To: NEO-15376

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2025-08-05 09:59:08 +02:00
Lukasz Jobczyk
3e2acefac1 fix: Do not align svm gpu greater than its svm cpu 
Resolves: HSD-18042781233

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
 2025-08-05 07:52:18 +02:00
Michal Mrozek
3eefd8a4ad refactor: add type for mutex and lock 
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
 2025-08-04 13:51:35 +02:00
Maciej Plewka
2c287c7c3b fix: allow to use bigger alignment than 2mb on linux 
Related-To: NEO-14082
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2025-08-04 11:38:50 +02:00
Slawomir Milczarek
fa4fd26be2 fix: Add missing registration of allocation from shared handle to smem 
Related-To: NEO-12952

Fixes debug assert triggered in unregisterAllocation()
for GPU_TIMESTAMP_DEVICE_BUFFER imported from shared handle:Y
DEBUG_BREAK_IF(allocation->getUnderlyingBufferSize() > sysMemAllocsSize);

Signed-off-by: Slawomir Milczarek <slawomir.milczarek@intel.com>
 2025-08-04 09:00:11 +02:00
Mateusz Jablonski
cabb92c9e1 fix: fail device initialization for incorrect product string in non-hw mode 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2025-08-01 16:21:40 +02:00
Mateusz Jablonski
d9d674cfb6 performance: optimize getting hw info for unspecified platform 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2025-08-01 15:29:47 +02:00
Zbigniew Zdanowicz
049bb10ce0 fix: correct encoding when destination gpu address is qword misaligned 
Related-To: NEO-15376

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2025-08-01 12:08:55 +02:00
John Falkowski
a45f47fad1 refactor: Disable Shared System USM if CPU addr range unacceptable 
Related-To: NEO-15680

Signed-off-by: John Falkowski <john.falkowski@intel.com>
 2025-08-01 07:50:46 +02:00
Neil R. Spruit
b4f37f3a98 fix: Allocate debug surface and isa as BO instead of userptr 
Related-To: NEO-14269

Signed-off-by: Neil R. Spruit <neil.r.spruit@intel.com>
 2025-07-31 20:24:54 +02:00
Zbigniew Zdanowicz
b57d0b2544 refactor: add method to arb check encoder to program buffer pointer directly 
Related-To: NEO-15376

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2025-07-31 16:01:00 +02:00
Tomasz Biernacik
71942483a2 refactor: make thread group implementation more flexible 
Signed-off-by: Tomasz Biernacik <tomasz.biernacik@intel.com>
 2025-07-31 16:00:29 +02:00
Zbigniew Zdanowicz
05158febdb refactor: add missing pipe control field in xehpg platform 
Related-To: NEO-15376

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2025-07-31 14:36:05 +02:00
Radoslaw Jablonski
7f11ca2f8b fix: use full path for drm_neo.h includes 
Signed-off-by: Radoslaw Jablonski <radoslaw.jablonski@intel.com>
 2025-07-31 11:15:18 +02:00
Dominik Dabek
15553b4544 fix: disable l0 usm pooling, bmg 
Related-To: GSD-11432

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
 2025-07-31 10:48:39 +02:00
Zbigniew Zdanowicz
08c34968f8 feature: add method to get command buffer gpu address of ending command 
Related-To: NEO-15376

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2025-07-30 15:17:08 +02:00
Radoslaw Jablonski
2a236d079c feature: add device caps helpers 
Related-To: NEO-13039

Signed-off-by: Radoslaw Jablonski <radoslaw.jablonski@intel.com>
 2025-07-30 15:03:38 +02:00
Alicja Lukaszewicz
3f7887dc6a refactor: add function for setting additional cache 
Related-To: NEO-15072, HSD-14024701488

Signed-off-by: Alicja Lukaszewicz <alicja.lukaszewicz@intel.com>
 2025-07-30 14:45:08 +02:00