Commit Graph

69 Commits

Author SHA1 Message Date
Mateusz Jablonski
5912b43841 refactor: remove dead code
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-09-17 13:41:50 +02:00
Michal Mrozek
ce3cb71773 performance: add debug flag to control timestamp caching
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2024-08-30 16:32:06 +02:00
Lukasz Jobczyk
5aa5d40937 performance: Mitigate dc flush on LNL Windows
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-08-28 13:35:17 +02:00
Compute-Runtime-Validation
ad0d6f5435 Revert "refactor: Add dc flush mitigation infrastructure"
This reverts commit e4412e385a.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-08-27 02:35:06 +02:00
Lukasz Jobczyk
e4412e385a refactor: Add dc flush mitigation infrastructure
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-08-26 10:38:56 +02:00
Katarzyna Cencelewska
153cda9a9f feature: add debug flag to force gmm system memory resource type
Related-To: NEO-10157
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2024-07-18 14:05:16 +02:00
Compute-Runtime-Validation
9a6403f3bc Revert "refactor: Add dc flush mitigation infrastructure"
This reverts commit d6076941a8.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-07-15 11:47:30 +02:00
Lukasz Jobczyk
d6076941a8 refactor: Add dc flush mitigation infrastructure
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-07-12 14:45:51 +02:00
Mateusz Jablonski
c207e3aadc test: remove not needed test excludes
correct namespace of excluded tests

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-07-05 10:27:14 +02:00
Compute-Runtime-Validation
38872b7e1b Revert "refactor: Add dc flush mitigation infrastructure"
This reverts commit 1cba900ad9.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-07-04 08:20:18 +02:00
Lukasz Jobczyk
1cba900ad9 refactor: Add dc flush mitigation infrastructure
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-06-25 14:53:24 +02:00
Michal Mrozek
0e29ab8387 performance: add debug key to control cpu cacheablitiy
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
2024-06-19 12:34:06 +02:00
Lukasz Jobczyk
5794ee8100 fix: Add printf surface to dc flush mitigation logic
Related-To: NEO-10556

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-06-19 10:45:36 +02:00
Compute-Runtime-Validation
33edd5f10e Revert "refactor: Add dc flush mitigation infrastructure"
This reverts commit bd46361e26.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-06-19 03:48:33 +02:00
Katarzyna Cencelewska
0f0e7403bd fix: use gmm type ocl system buffer for tag buffer
Related-To: NEO-11690, NEO-11698
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2024-06-18 20:54:19 +02:00
Lukasz Jobczyk
bd46361e26 refactor: Add dc flush mitigation infrastructure
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-06-18 14:03:27 +02:00
Lukasz Jobczyk
9a2fa1dcb1 fix: Override prefer no cpu access for dc flush mitigation
Related-To: NEO-10556

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-06-05 10:26:45 +02:00
Lukasz Jobczyk
eb3b0c5711 fix: Disable cache for heaps when mitigating dc flush
Related-To: NEO-10556

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-06-03 13:40:55 +02:00
Compute-Runtime-Validation
166cdfedf5 Revert "refactor: Add dc flush mitigation infrastructure"
This reverts commit f2d56744e3.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-05-30 03:03:14 +02:00
Lukasz Jobczyk
f2d56744e3 refactor: Add dc flush mitigation infrastructure
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-05-29 12:13:44 +02:00
Lukasz Jobczyk
a9269939f6 fix: Defer MOCS to PAT
Related-To: NEO-10556

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-05-27 10:26:26 +02:00
Compute-Runtime-Validation
ce0ccacef6 Revert "fix: Defer MOCS to PAT"
This reverts commit 6c75ec3116.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-05-25 06:22:22 +02:00
Lukasz Jobczyk
6c75ec3116 fix: Defer MOCS to PAT
Related-To: NEO-10556

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-05-24 15:30:49 +02:00
Compute-Runtime-Validation
ad2ff7972c Revert "refactor: Add dc flush mitigation infrastructure"
This reverts commit 9dbf83c85a.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-05-23 02:26:17 +02:00
Katarzyna Cencelewska
12d1bce6b9 fix: change gmm resource for externalHostPtr
Resolves: NEO-10157

Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2024-05-22 16:50:17 +02:00
Lukasz Jobczyk
9dbf83c85a refactor: Add dc flush mitigation infrastructure
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-05-22 12:03:06 +02:00
Compute-Runtime-Validation
94a4bbac57 Revert "fix: change gmm resource for externalHostPtr"
This reverts commit 63843862df.

Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com>
2024-05-21 07:43:53 +02:00
Katarzyna Cencelewska
63843862df fix: change gmm resource for externalHostPtr
Resolves: NEO-10157

Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2024-05-21 00:43:29 +02:00
Pawel Cieslak
f10439aea2 fix: include <algorithm> where std::find is used
Related-To: NEO-11375
Signed-off-by: Pawel Cieslak <pawel.cieslak@intel.com>
2024-05-14 16:14:41 +02:00
Lukasz Jobczyk
a230c762e0 feature: Adjust PATs for dc flush mitigation
Related-To: NEO-10556

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-04-16 13:31:02 +02:00
Lukasz Jobczyk
8a0c425495 feature: Mark selected resources as UC when mitigating dc flush
Related-To: NEO-10556

Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com>
2024-04-12 12:52:13 +02:00
Mateusz Jablonski
cb2b572e94 feature: add support for null aub mode
In this mode AUB csr will be created, however, no aub file will be created

Related-To: NEO-11097
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-04-09 16:59:42 +02:00
Mateusz Jablonski
78a4a92b44 refactor: reorder members to reduce internal padding in structs
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-03-25 15:50:00 +01:00
Mateusz Jablonski
1e1d675606 fix: disable passing FtrTile64Optimization to gmmlib
add debug key to control if the value should be passed

Related-To: NEO-10785
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-03-15 17:42:53 +01:00
Mateusz Jablonski
8ae4a3bc7a fix: pass Sku/Wa tables for gmm without additional translations on Windows
Related-To: NEO-10623
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2024-03-06 14:58:58 +01:00
Katarzyna Cencelewska
d0b009901c fix: use proper gmm resource type for uncache resources
when new coherency model

Resolves: NEO-9657
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2024-01-31 15:26:11 +01:00
Katarzyna Cencelewska
eec01e500a fix: non-coherency issue on arl
Resolves: HSD-15015200338
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
2024-01-26 10:26:33 +01:00
Mateusz Jablonski
138fb65401 refactor: correct naming of enum class constants 11/n
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-19 14:52:57 +01:00
Mateusz Jablonski
dd1b9d6abc refactor: correct naming of enum class constants 8/n
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-19 08:18:18 +01:00
Mateusz Jablonski
b182917d9d refactor: correct naming of allocation types
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-12-11 16:23:37 +01:00
Mateusz Jablonski
c9664e6bad refactor: rename global debug manager to debugManager
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-11-30 13:00:59 +01:00
Dominik Dabek
8f06f3f50a performance: add override cacheable to gmm
add attribute to override cacheable attribute to gmm constructor

enable this override for command buffers on mtl

change command buffers back to allocation by kmd

this keeps the quicker allocation which is needed to keep enqueue times
low

Related-To: NEO-8152

Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-11-16 10:00:45 +01:00
Dominik Dabek
961a8d91d0 refactor: move gmm constructor flags to struct
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
2023-11-15 09:26:13 +01:00
Dunajski, Bartosz
0592390e2b refactor: print gmm compression settings
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
2023-10-16 09:14:52 +02:00
Mateusz Jablonski
3eb98163a8 fix: define isCachingOnCpuAvailable per hw release
Related-To: NEO-8187
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-09-13 11:13:42 +02:00
Mateusz Jablonski
f94ed7cd28 refactor: pass root device environment to CacheSettingsHelper::preferNoCpuAccess
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
2023-09-13 09:32:36 +02:00
Filip Hazubski
3e811fc9d4 test: Move shared code tests from gmm_helper_tests.cpp to shared directory
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2023-07-31 08:44:26 +02:00
Filip Hazubski
8dd23f4b4d feature: Add logic around cpu side allocations
Group allocation types related to cpu side allocations in function to
query gmm usage type. These types will have caching enabled even if
CPU caching is not preferred by GPU.

Add logic to query whether the cpu access is allowed for an allocation
(in cases when it is not preffered by GPU).

Related-To: NEO-7194

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
2023-07-28 21:04:24 +02:00
Cencelewska, Katarzyna
d2436a8231 fix: add limitations for setting gmm flag Cacheable
- move isCachingOnCpuAvailable to product helper
- isCachingOnCpuAvailable should return false on mtl
- if wsl, skip checking method from product helper

Related-To: NEO-7194
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-05-30 17:04:57 +02:00
Cencelewska, Katarzyna
5f22e9eaca fix: don't set Cacheable on xe_hp and later
Related-To: NEO-7194
Signed-off-by: Cencelewska, Katarzyna <katarzyna.cencelewska@intel.com>
2023-05-18 09:17:32 +02:00