- remove not used parameter.
- remove the usage of default parameters.
- move some constants to memory management as well.
Change-Id: Iedf374568fa3594ffad6b53534e4483485863324
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
- Inject dispatch methods per DispatchInfo
- Each DispatchInfo in MultiDispatchInfo can have different behaviour
- Implement AuxTranslation programming with new approach
Change-Id: Ie28de0c72a77b8e91509a5b9b8740d72fedf4ad6
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
- Do not emit batch buffer
- obtain completion stamp directly from csr
Change-Id: I7ff58f2f019ee8158665f6fb93682ce5aae17bd6
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
- It could happen that 2 threads try to update the same event within tree
- First thread starts to submit command, it releases cmdToSubmit
- Second thread doesn't see the command and follows
- Second thread thinks that it submitted the command so it follows to
subsequent steps which are child events notification
- We end up with corrupted enqueue sequence as child may submit prior to
parent.
- With this change each submit step is synchronized basing on task count
- When second thread enters submit command without task count being set
it wait for first thread to properly set it.
Change-Id: Ic2ddaea17f9af8cab6781320edae2c268dd0b189
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
- do not wait on map/unmap if zero copy resource.
- do not wait in marker commands at all.
Change-Id: I74cdd8320d13602bf662eed412ed2fcad1504989
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
- is queue blocked to release virtual event when it is submitted
- do not wait on completion after ndr submit.
Change-Id: I63c54e6940f6241b32f0dbdd5880f849c46fd12e
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
Return CL_INVALID_GLOBAL_WORK_SIZE error if global_work_size contains 0 for
OpenCL older than 2.1
Do not throw exception if global_work_size contains 0
Related-To: NEO-3111
Change-Id: If7b7884465117d9c0615ace2bb682b3b1c7d8bdb
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
- Add kernel support for host um allocations
- During make resident call choose only appropriate resources for residency
- change resource types to binary bit friendly values
- enhance memory manager to only make resident compatible types
Related-To: NEO-3148
Change-Id: Ic711a4425a0d8db151a335e0357440312dc09b7e
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
- Change function names to indicate they work on SVM allocations.
- Remove one function used only in tests.
Change-Id: I9b18d9fee3d4f2a46a7f458ca73d39b3863ce6d3
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
- Add Internal Allocation type to differentiate SVM allocs from UM allocs.
- Add API to make internal allocations resident.
- Add API to allocate UM.
Related-To: NEO-3148
Change-Id: I9787891c5a0ffccac45c43bc5fde4ea50f37d703
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
Related-To: NEO-2665
Replace imageRowPitch with imageSlicePitch
for read/write CL_MEM_OBJECT_IMAGE1D_ARRAY
Change-Id: I0d5931629571f538f242e112c502e2f798ffd896
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
Related-To: NEO-2665
Replace imageRowPitch with imageSlicePitch
for read/write CL_MEM_OBJECT_IMAGE1D_ARRAY
Signed-off-by: Koska, Andrzej <andrzej.koska@intel.com>
Change-Id: I67bd0567dcee05027f3d25ef65796e332b9a4773
- There was overestimation that resulted in each kernel getting
page aligned estimation size.
- After this change every kernel aligns only to cache line and final
size is aligned to page size.
Change-Id: Iee06bdd0083724ea7e9415f3d0fe70198acca407
Signed-off-by: Mrozek, Michal <michal.mrozek@intel.com>
