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211 Commits

Author SHA1 Message Date
Venevtsev, Igor
73a63c7689 Fix Read/WriteBuffer for unaligned offsets 
Change-Id: I08d33e80243f41174f4629c8a611e286629d2e10
 2018-12-31 14:50:07 +01:00
Kamil Diedrich
fad2f8dbd1 Change auxTranslationDirectory 
Change-Id: I5d433d340e945b799dbec25a22fd610312f00c0a
 2018-12-28 16:46:42 +01:00
Artur Harasimiuk
b5f443edc0 Revert commit cc1f4bed60. 
This reverts commit cc1f4bed60.
Revert "Revert "Use GPU instead of CPU address in programming commands
for HwTim(...)""

Change-Id: Iff122612bb46ba80bcc70b07b2609bfd5f0b9653
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-12-21 13:25:49 +01:00
Artur Harasimiuk
b2c1d68a91 Revert "Revert "Revert "Fix Read/WriteBuffer for unaligned offsets""" 
This reverts commit f6757c02a4.

Change-Id: I239528e7588dc9766b10a7ce7e517d6b2cdd6375
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2018-12-21 08:57:45 +01:00
Pawel Wilma
cc1f4bed60 Revert "Use GPU instead of CPU address in programming commands for HwTim(...)" 
This reverts commit 6202b2222b.
"Use GPU instead of CPU address in programming commands for HwTimeStamps"

Change-Id: I085382d95538ae41068a21c628d606039bf9cdf0
 2018-12-21 01:16:46 +01:00
Venevtsev, Igor
f6757c02a4 Revert "Revert "Fix Read/WriteBuffer for unaligned offsets"" 
This reverts commit 71f6524197.

Change-Id: I4f31fb6fa14fb5e3b8d8bf0a1745429bcdacd5af
 2018-12-20 14:16:07 +01:00
Kamil Diedrich
4b1871bf0e Add pipe control before and after buffer translation 
Change-Id: I4ee32c410e1ac2bcdb3ceae203cd461de79146a5
 2018-12-20 09:30:53 +01:00
Zdanowicz, Zbigniew
3dca095ccf Add cache flush command after WALKER command 
Change-Id: I3983dc6c0797047e17cc8189655a22a22e85892b
 2018-12-19 13:15:33 +01:00
Kamil Diedrich
b2e0195663 Change Buffer to MemObj in BufferForAuxTranslation collection 
Change-Id: Icbdb8fecaa3fd8e19e993502f59c76156fe4ad2c
 2018-12-19 08:05:51 +01:00
Piotr Fusik
e8a71132a4 Remove unnecessary casts. 
Change-Id: I2d293d065c7efa006efe7d60a625cba0c6116c86
 2018-12-18 13:42:14 +01:00
Mateusz Jablonski
8ec072d39c Simplify Memory Manager API [3/4] 
- remove method allocateGraphicsMemory(size_t size)
- pass allocation type in allocation properties
- set allocation type in allocateGraphicsMemoryInPreferredPool

Change-Id: Ia9296d0ab2f711b7d78aff615cb56b3a246b60ec
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-17 10:42:16 +01:00
Pawel Wilma
5094c630f7 Force resource locking on transfer calls 
Add debug variables to force resource locking on memory transfer calls
and to call makeResident() on mapVirtualAddress() call.

Change-Id: Ifa78d951fcb81812b10a98252bd414124dec9c74
 2018-12-14 12:25:28 +01:00
Mateusz Jablonski
74510286a1 Command Queue: Destroy timestamp packet container before releasing context 
Change-Id: I7ee492586ee178bc89c44d5d6663d3ff8fb2e778
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-12-14 08:26:46 +01:00
Dunajski, Bartosz
010e1a4738 VFE state programming cleanup 
Change-Id: I38fb47b00211a1d28244369ac417427ada145f61
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-13 17:44:40 +01:00
Dunajski, Bartosz
6face330fd Select RCS1 for low priority CommandQueue 
Change-Id: I86b5cb19bfbb358c5036fe4027ea82287a5f4e39
 2018-12-13 07:41:56 +01:00
Pawel Wilma
6202b2222b Use GPU instead of CPU address in programming commands for HwTimeStamps 
Change-Id: If9ab4cbd052dfa46b5d901073df4c583c2ae361f
Signed-off-by: Pawel Wilma <pawel.wilma@intel.com>
 2018-12-12 13:27:53 +01:00
Dunajski, Bartosz
d870359434 Revert "Select RCS1 for low priority CommandQueue" 
Change-Id: I8d6a4ed76917c73aad96bbb69ef42ffb7b416eb6
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-09 17:42:18 +01:00
Dunajski, Bartosz
481b83b436 Add throttle hint to unblocked enqueue path 
Change-Id: Id24e00f0f797d6245e897ba4e709d42f2ef0f5e8
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-07 14:13:31 +01:00
Dunajski, Bartosz
7f7808fb71 Select RCS1 for low priority CommandQueue 
Change-Id: I1f86b0afedb8f6e76fee896c2751a0bf196996d7
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-07 13:18:13 +01:00
Dunajski, Bartosz
52fbf6473b Minor refactor of CommandQueue class 
Change-Id: Iab64ad133fe96402d9577b64380472729f0190a8
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-12-06 12:45:25 +01:00
Dunajski, Bartosz
0131e66a70 Allow Device creating multiple CSRs [6/n] 
- Introduce default Engine query
- Improve Deferred Deleter usage
- Remove Tag Allocation from Device

Change-Id: Iaa88d8dc0166325acf9a157dcd2217ea408ee285
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-29 16:20:13 +01:00
Piotr Fusik
87bb6afa56 Move stamps allocators from memory manager to CSR. 
Change-Id: Ib399e462cdddad89fcc470df4c4f0f5e4591a6b2
 2018-11-27 14:52:06 +01:00
Dunajski, Bartosz
2d77b86e70 Allow Device creating multiple CSRs [5/n] 
- Move Engine type to OsContext
- Move OsContext to CSR
- Improve EngineMapper logic
- CompletionStamp cleanup

Change-Id: I935cb7169c8c48cd09837e20e3da06f6dd3437b9
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-27 14:25:04 +01:00
Pawel Wilma
71f6524197 Revert "Fix Read/WriteBuffer for unaligned offsets" 
This reverts commit 6ea863e440.

Change-Id: Ib58cfe4cffc022b1514c42131914eb2fe64fcbe0
 2018-11-27 12:35:03 +01:00
Mrozek, Michal
a1348f2f94 Remove not needed method. 
Change-Id: Id06991b374b063470a2f69daada23098c1c487d5
 2018-11-23 14:09:30 +01:00
Dunajski, Bartosz
7e72b16aa4 Add processProperties method to CommandQueue constructor 
Change-Id: If5b88de5311e3ab3973e47e70a1027cd7e0e791c
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-23 13:08:42 +01:00
Mrozek, Michal
61e7ae9280 Refactor pipe control post sync programming. 
Change-Id: I81f4840345494c6d32679e29faaff786677cb4b0
 2018-11-23 11:42:32 +01:00
Dunajski, Bartosz
3ad33bf1b8 Allow Device creating multiple CSRs [3/n] 
Add CSR from Device to CommandQueue

Change-Id: Iaccf3c73d25e357242837677777d0513e81f520e
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-23 10:51:34 +01:00
Dunajski, Bartosz
d6870a896b Reduce tag pool size to 1 for AUBs 
Change-Id: I3a3513250b10e899795e149bff2739193a725f84
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-20 11:42:32 +01:00
Venevtsev, Igor
6ea863e440 Fix Read/WriteBuffer for unaligned offsets 
Change-Id: Ia8daff3e95bd724a9f678eb471dbb44a66cc0bc7
 2018-11-20 09:25:12 +01:00
Mrozek, Michal
08424d798f Enable power saving mode for queues created with throttle hint low. 
- When queue is created with throttle hint low it should be power conservative
- With this change whenever queues with low throttle setting requests wait
for GPU completion, such wait will be handled in power conservative manner.
- Whenever GPU is not completed, waiting thread will be put to sleep and will
for GPU completion that triggers the wake up interrupt.

Change-Id: I9f34872a38ab9f5952f9d9623ea43503fc3dd587
 2018-11-16 15:20:31 +01:00
Mrozek, Michal
5b316d142c Delete drm requirement tests. 
- Those requirements are no longer valid.

Change-Id: I8885c2591fccf8825d812128ead6a637e353009f
 2018-11-15 12:34:30 +01:00
Piotr Fusik
e66920a8f8 Fix typos. 
Change-Id: Ie7add32684f812e11281668d9b93910384086c62
 2018-11-15 12:18:03 +01:00
Piotr Fusik
76efeae9d8 Pass more information to programPipelineSelect. 
Change-Id: Iaabe60742269b721f8defe71306dd6e87d60d546
 2018-11-15 11:45:45 +01:00
Dunajski, Bartosz
e0f782e77a Improve TimestampPacketWriteEnabled condition check 
Change-Id: I2117dbd7841e65ed87241c0b08fafe058019b690
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-11-13 13:40:33 +01:00
Dunajski, Bartosz
1e0064fc2f Allow ULTs to work with enabled TimestampPacketWrite 
Change-Id: Idd4622469220b859e8724d9179837c685377ce52
 2018-11-07 08:50:04 +01:00
Woloszyn, Wojciech
549b73510c Flush L3 for reduced address space platforms 
Change-Id: I5a73e72f8e309137328930920ab174ba6f1378dc
 2018-11-06 14:26:59 +01:00
Mateusz Jablonski
ead2e2ea6d Move createAllocationForHostPtr method to command stream receiver 
Remove not needed includes from command_queue.h

Change-Id: I45963bf005471bd7716d55471474299a15e27b62
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-30 17:49:08 +01:00
Zdanowicz, Zbigniew
7a4ecd1507 Add new simple kernel and method to adjust WALKER command parameters 
Change-Id: Id0591908353ca744c44c7bab4e27db8332289a68
 2018-10-26 15:02:28 -07:00
Mateusz Jablonski
baa9ce74a7 Remove obtainReusableAllocation method from memory manager 
Change-Id: I629044d109822f02cfddc6418f025010e62ab65b
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-26 09:06:20 +00:00
Mateusz Jablonski
d5c9816428 Remove store allocation methods from memory manager 
Move setGPUAddress method to WddmAllocation

Change-Id: I91d877c3791e9eff69276e4258e3ce9c3111ca45
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2018-10-26 10:53:43 +02:00
Piotr Fusik
4bdf183c9d Use the runtime CS size estimation in ULTs. 
EnqueueOperation<GfxFamily>::getTotalSizeRequiredCS was ULTs-only.
Replace with the real CS size estimation from getCommandStream.

Change-Id: I4d15d342eb5edff6511acc9c80e13e9cc92d81ac
 2018-10-23 13:07:42 +02:00
Zdanowicz, Zbigniew
f3a732081e Change interface to program cross-thread data 
Change-Id: I96bf4bddf1557f588fd745efca7b19ec2f38a78e
 2018-10-18 23:55:29 +02:00
Dunajski, Bartosz
6d610983f1 Deferred Pipe Control programming and CSR flush on Barrier request 
Change-Id: Iabae0f9159bb455518cedf7da068c7d3da72b840
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-10-17 09:31:34 +02:00
Dunajski, Bartosz
66427f60c6 Handle TimestampPackets for non-kernel enqueues 
Change-Id: I52ec4f43b10bf6e2a10b2455d32a90a606645d29
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-10-10 04:21:30 +02:00
Zdanowicz, Zbigniew
bb62343aba Add new parameter to thread data dispatching 
Change-Id: I86710b0cc764156f4c2db9d24ccd1c96b32d7660
 2018-10-05 12:06:25 +02:00
Dunajski, Bartosz
73b2e947a5 Multiple TimestampPackets handling 
Change-Id: Ia5936c3d0a34b892aa4444026a5aebc681f126c2
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2018-10-05 01:54:35 +02:00
Zdanowicz, Zbigniew
2d7077e138 Fix correct command buffer estimation for non-kernel enqueue calls 
Change-Id: I8655d1824c229f13104e085f55fa15c310a17210
 2018-10-05 00:47:54 +02:00
Koska, Andrzej
2110ba6ca4 Passing correct taskCount to waitForTaskCountAndCleanAllocationList 
Change-Id: Ib0d2474bcd5827f8030331f7ef45ffc2805b955b
 2018-10-04 23:53:43 +02:00
Filip Hazubski
3fdb17bc7f Move hw specific GpgpuWalkerHelper functions to separate file 
Change-Id: If2e793d0c3de1a5245bbdee065111a504807b134
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2018-10-03 20:19:47 +02:00