Dominik Dabek
a683caa2fc
fix: disable l0 usm reuse, xe3
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Related-To: NEO-6893, HSD-18042686324
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com >
2025-07-14 13:13:17 +02:00
Mateusz Jablonski
41ce81143a
refactor: remove not needed flags p2pAccessSupported, p2pAtomicAccessSupported
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such support is queryable in runtime
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2025-07-01 11:37:51 +02:00
Compute-Runtime-Validation
9ca238a73b
Revert "performance: Do not prefer blit enqueue on PTL"
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This reverts commit 62f2a86f16 .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-07-01 10:20:12 +02:00
Lukasz Jobczyk
62f2a86f16
performance: Do not prefer blit enqueue on PTL
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-06-26 13:25:39 +02:00
Dominik Dabek
cc92027f79
performance: enable ocl usm reuse xe3
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also split per api type (ocl,l0) pre xe3
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com >
2025-06-24 16:55:07 +02:00
Szymon Morek
0db5ce22a1
performance: use resource_barrier on Xe2 and PTL
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Related-To: NEO-14943
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-06-24 14:24:47 +02:00
Bellekallu Rajkiran
1be3d6ad37
refactor: Refactor product helpers
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Related-To: NEO-14627
Signed-off-by: Bellekallu Rajkiran <bellekallu.rajkiran@intel.com >
2025-06-20 23:04:34 +02:00
Michal Mrozek
f6cb013896
refactor: remove redundant member
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- it is true on all platforms.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com >
2025-06-18 16:15:30 +02:00
Szymon Morek
558752288f
performance: set 1ms ULLS timeout on Windows since Xe2
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Related-To: NEO-13843
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-06-17 08:09:24 +02:00
Grochowski, Stanislaw
a8394cbdeb
refactor: remove WalkerVariant
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Related-To: NEO-14537
Signed-off-by: Grochowski, Stanislaw <stanislaw.grochowski@intel.com >
2025-06-16 11:30:32 +02:00
Mateusz Jablonski
05a9f9b18c
feature: add support for release 30.3 (WCL)
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Related-To: NEO-15081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2025-06-12 16:34:55 +02:00
Chodor, Jaroslaw
767755df94
refactor: introducing AOT platforms wrapper
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Signed-off-by: Chodor, Jaroslaw <jaroslaw.chodor@intel.com >
2025-06-11 15:30:24 +02:00
John Falkowski
805a716fe3
feature: Implement appendMemoryCopy/Fill for Shared System USM
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Related-To: NEO-13697
Signed-off-by: John Falkowski <john.falkowski@intel.com >
2025-06-09 16:18:56 +02:00
Bartosz Dunajski
a015188166
refactor: unify prefetch encode methods
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Related-To: NEO-14703
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2025-06-03 10:07:26 +02:00
Bartosz Dunajski
9647612f98
fix: update prefetch mocs settings
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Related-To: NEO-14703
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com >
2025-06-02 13:22:42 +02:00
Compute-Runtime-Validation
1a50e8e7c0
Revert "performance: use RESOURCE_BARRIER as stalling barrier"
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This reverts commit 556c0b64c6 .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-05-30 18:00:34 +02:00
Lukasz Jobczyk
332340b02b
refactor: Prework for release fence removal leaving acquire fence
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Related-To: NEO-14642
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-05-30 12:01:28 +02:00
Grochowski, Stanislaw
2d9108f8b6
refactor: change DefaultComputeWalker
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Related-To: NEO-14537
Signed-off-by: Grochowski, Stanislaw <stanislaw.grochowski@intel.com >
2025-05-29 18:05:29 +02:00
Katarzyna Cencelewska
e357e7e404
fix: correct limitation for num threads per thread group
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taking into account the max work group limit
when simd1 don't use the same limitation as for simd32
Resolves: NEO-14922
Related-To: NEO-11881
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com >
2025-05-29 16:34:40 +02:00
Vysochyn, Illia
3989471ffc
fix: Use round robin after stall as a default arbitration mode
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Related-To: NEO-14251,HSD-18042035684,HSD-18041638491,HSD-18042040816
Signed-off-by: Vysochyn, Illia <illia.vysochyn@intel.com >
2025-05-28 17:47:48 +02:00
Szymon Morek
556c0b64c6
performance: use RESOURCE_BARRIER as stalling barrier
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Related-To: NEO-14943
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-05-28 12:30:01 +02:00
Maciej Plewka
e6f3ebce5d
fix: add pc with stall before barrier with post sync on bmg
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Related-To: NEO-14491
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com >
2025-05-28 09:24:21 +02:00
Lukasz Jobczyk
2e9643f46c
performance: Enable small buffer pool allocator on PTL
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Resolves: NEO-14817
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-05-26 22:07:50 +02:00
Compute-Runtime-Validation
593c9e76f2
Revert "fix: correct limitation for num threads per thread group"
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This reverts commit 6ad4ad41b1 .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-05-23 02:51:17 +02:00
Lukasz Jobczyk
680fa1ec1d
refactor: Split direct_submission_hw.inl
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-05-22 11:27:52 +02:00
Katarzyna Cencelewska
6ad4ad41b1
fix: correct limitation for num threads per thread group
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taking into account the max work group limit
Resolves: NEO-14922
Related-To: NEO-11881
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com >
2025-05-22 00:06:21 +02:00
Compute-Runtime-Validation
8839d62c79
Revert "performance: use RESOURCE_BARRIER as stalling barrier"
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This reverts commit 2a63853349 .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-05-16 20:19:06 +02:00
Szymon Morek
2a63853349
performance: use RESOURCE_BARRIER as stalling barrier
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Related-To: NEO-14943
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-05-16 14:12:18 +02:00
Zbigniew Zdanowicz
2b734880e0
refactor: add new alias type for walker type
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Related-To: NEO-10492
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com >
2025-05-16 09:08:32 +02:00
Szymon Morek
ffe3198b72
feature: add RESOURCE_BARRIER command
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Related-To: NEO-14943
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-05-15 10:11:04 +02:00
Aleksandra Nizio
fa1e3fd6a2
fix: Remove old aub_mem_dump logic and related tests
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Related-To: NEO-14718
Signed-off-by: Aleksandra Nizio <aleksandra.nizio@intel.com >
2025-05-13 08:38:59 +02:00
Young Jin Yoon
5221b5b00e
fix: patch counter values with additional blit properties
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Modified BlitCommandsHelper and CommandListHw to patch counter values
when using additional blit properties and in order command list is
enabled.
Related-To: NEO-13003
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com >
2025-05-13 04:32:31 +02:00
Szymon Morek
ef9eb2f703
performance: enable staging buffers on PTL
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Related-To: NEO-14820
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-05-09 12:56:21 +02:00
Lukasz Jobczyk
1d1414febc
refactor: remove unused dc flush mitigation
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-05-09 08:26:26 +02:00
Szymon Morek
2f5c6613d0
performance: resolve dependencies by PC on PTL linux
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Related-To: NEO-14818
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-05-08 20:19:21 +02:00
Szymon Morek
6ae43123f6
fix: correct usages of ULLS-related resources
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Related-To: NEO-14360
Current gmm usage type of these resources is causing
them to be cached, which is incorrect.
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-05-08 12:12:45 +02:00
Michal Mrozek
afdc04975f
refactor: remove ftrSvm variable
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- it is true on all platforms.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com >
2025-05-07 16:16:42 +02:00
Mateusz Jablonski
04990d90f7
refactor: remove not needed device parameter from AUBFamilyMapper
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2025-05-07 15:43:40 +02:00
Michal Mrozek
c3eec70a97
refactor: remove not needed hw info member
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- it is false on all platforms.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com >
2025-05-07 14:17:49 +02:00
Tomasz Biernacik
f03decfc25
performance: disable coherency for buffers on PTL
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Related-To: NEO-9421
Signed-off-by: Tomasz Biernacik <tomasz.biernacik@intel.com >
2025-05-05 13:47:23 +02:00
Young Jin Yoon
529b89c16a
feature: support copy function post-sync [4/n]
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Added EncodePostSync to BlitPostSyncProperties, and
applyAdditionalBlitProperties to BlitCommandsHelper.
Related-To: NEO-13003
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com >
2025-05-02 00:02:43 +02:00
Compute-Runtime-Validation
0c3b765942
Revert "refactor: add BlitSyncPropertiesExt to BlitSyncProperties"
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This reverts commit b5a259aded .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-05-01 03:23:53 +02:00
Young Jin Yoon
b5a259aded
refactor: add BlitSyncPropertiesExt to BlitSyncProperties
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Added BlitSyncPropertiesExt to provide additional information for
different platform and/or blitter commands.
Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@intel.com >
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com >
2025-04-30 19:11:34 +02:00
Lukasz Jobczyk
3d1ea7165c
refactor: move semaphore to smem when no acquire fence required
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Related-To: NEO-14642
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-04-30 13:13:27 +02:00
Lukasz Jobczyk
02444ac0e6
refactor: Use global fence helper for additional synchronization
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Related-To: NEO-14642
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-04-25 14:44:13 +02:00
Mateusz Jablonski
f6b92aa5d5
build: update default PTL revision to B0
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2025-04-16 09:44:58 +02:00
Lukasz Jobczyk
455209aadc
refactor: Simplify fence selection in ULLS
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Related-To: NEO-14642
Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-04-15 14:04:47 +02:00
Marcel Skierkowski
31f0fd4672
refactor: rename variable slmSize
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Max programmable slm size is stored in RuntimeCapabilityTable as slmSize.
That is misleading name
Rename the variable slmSize to better reflect the actual meaning of the member.
Related-To: NEO-12949
Signed-off-by: Marcel Skierkowski <marcel.skierkowski@intel.com >
2025-04-14 20:00:29 +02:00
Kamil Kopryk
dd3d294f87
performance: cache MOCS values
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This change caches the most used MOCS values:
* getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CONST);
* getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER);
* getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED);
inside gmmHelper class during initialization to avoid repeated
calls of virtual functions, branches and/or gmm lib access.
and adds more readably corresponding getters:
* getL1EnabledMOCS
* getL3EnabledMOCS
* getUncachedMOCS
If force all resources uncached is called,
these 3 cached mocs values are reinitialized
It also changes the order of gmmHelper members, to avoid
not needed padding after addressWidth
and simplifies logic in getMocsIndex function
for xehp and later products.
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2025-04-14 14:12:48 +02:00
Jaroslaw Warchulski
c010d17842
fix: respect compression flag in capability table
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Related-To: NEO-9465
Signed-off-by: Jaroslaw Warchulski <jaroslaw.warchulski@intel.com >
2025-04-03 15:36:55 +02:00