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acac5ea0d55ff83d2c098f766af24111f00afec4
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131 Commits

Author SHA1 Message Date
Zbigniew Zdanowicz
acac5ea0d5 Use correct engine group type when programming state base address 
Command lists and their helper classes should use engine group type
assigned to the particular command list to check if it is RCS group
and not use default CSR class assigned to the device, since default
and current in command list might be different.

Related-To: NEO-5019

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-08-17 20:38:23 +02:00
Rafal Maziejuk
ed0c36117e Apply heuristics when setting TG dispatch size on XE_HPC_CORE 
The default TG dispatch size can be changed
to a better value based on number of threads in TG or
currently available amount of threads on GPU.
Decision on what TG dispatch size should be are based on
implemented heuristics.

Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
Related-To: NEO-6989
 2022-08-08 16:43:10 +02:00
Dunajski, Bartosz
98d776867f Add initial support for KernelArgsBuffer allocation 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-08-03 20:28:21 +02:00
Dunajski, Bartosz
c200c6e2dd Pass LSH to EncodeDispatchKernel 
Signed-off-by: Dunajski, Bartosz <bartosz.dunajski@intel.com>
 2022-07-26 15:37:28 +02:00
Kamil Kopryk
d4d54f5093 Cleanup includes 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2022-07-25 09:58:38 +02:00
Jim Snow
f4879f064f Allocate per-tile RTDispatchGlobals, handle ray tracing patch tokens. 
Related-to: NEO-6711

Signed-off-by: Raiyan Latif <raiyan.latif@intel.com>
 2022-07-22 06:29:29 +02:00
Bartosz Dunajski
2c853adac3 Use LogicalStateHelper to program ComputeMode 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-06-27 15:25:55 +02:00
Zbigniew Zdanowicz
5bce1eceb1 Remove self cleanup section when using immediate command list 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-06-27 13:29:52 +02:00
Bartosz Dunajski
61b2ee45cd Use LogicalStateHelper to encode SystemMemoryFence 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-06-24 13:29:58 +02:00
Katarzyna Cencelewska
615fd4c37a Add programming of Dispatch Walk Order in COMPUTE_WALKER for xe_hpg 
- update xe_hpg generated commands
- add method isAdjustWalkOrderAvailable

Related-To: NEO-7065
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-06-17 10:42:15 +02:00
Zbigniew Zdanowicz
f5b1a0e45b Use internal event object in command lists methods 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-06-14 21:23:43 +02:00
Maciej Bielski
8de043b71f Stop redundant SBA programming due to global atomics 
For all platforms different than XE_HP_SDV (ATS) stop considering the
`useGlobalAtomics` flag as a decisive factor for trigerring the SBA
(StateBaseAddress) programming on the HW. Only XE_HP_SDV supports such
flag.

For consistency of the implementation, keep the related logic in one
place only, that is a helper in `command_encoder` and then just reuse it
in different places (`command_stream_receiver`).

Related-To: NEO-6953
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
 2022-06-08 10:39:56 +02:00
Zbigniew Zdanowicz
afceaa6e19 Use system fence only when using system allocations or system scope event 
Related-To: NEO-6959

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-05-31 12:55:30 +02:00
Katarzyna Cencelewska
b2021498e2 Create method adjustWalkOrder 
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-05-27 16:05:31 +02:00
Zbigniew Zdanowicz
8431234845 Change interface to method programing additional fields of command 
Related-To: NEO-6959

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-05-26 21:32:59 +02:00
Katarzyna Cencelewska
96e1eb7467 Move variables baseDieRev and baseDieA0Masked from xe_hpc to pvc 
Pvc specific variables should be located in pvc struct

Related-To: NEO-6738
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-05-17 12:19:16 +02:00
Artur Harasimiuk
7eafb1e877 remove unused code 
Signed-off-by: Artur Harasimiuk <artur.harasimiuk@intel.com>
 2022-05-16 18:15:03 +02:00
Filip Hazubski
3900c9d24a Report to StreamProperties whether large grf should be programmed with SCM 
Add helper method to UnitTestHelper to query programmed grf values.

Related-To: NEO-6659

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-04-27 13:20:14 +02:00
Filip Hazubski
944319b3d9 Correct media compression format for blitter operations on planar images 
Set most significant bit for chroma planes.
Move common logic to helper function.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-04-22 17:02:16 +02:00
Mateusz Hoppe
5911515ed0 Refactor debugger code 
- helper sets all SbaAddresses for debugger in
EncodeStateBaseAddress<GfxFamily>::setSbaAddressesForDebugger()
- change DebuggerL0::captureStateBaseAddress() to take
LinearStream
- move getSbaTrackingCommandsSize() to Debugger class

Related-To: NEO-6845

Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2022-04-21 13:04:34 +02:00
Bartosz Dunajski
db9c0d1103 Refactor and enable MI_MEM_FENCE programming for DirectSubmission dispatch 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-04-07 12:53:56 +02:00
Zbigniew Zdanowicz
f4407064a4 Refactor store register mem encoder to include partition parameter 
Related-To: NEO-6811

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-04-06 14:00:56 +02:00
Mateusz Hoppe
beff0019d1 SBA tracking for single address space 
Related-To: NEO-6539


Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com>
 2022-04-01 15:24:11 +02:00
Filip Hazubski
3123ab5bf9 Correct media compression format for planar images 
Set most significant bit for chroma planes.

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-03-26 21:54:08 +01:00
Mateusz Jablonski
e11eb46bff Unify logic for programming mocs in post sync struct 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-03-25 17:01:51 +01:00
Krzysztof Gibala
ebc006ad53 Move SBA related WAs logic from CSR to EncodeWA 
Signed-off-by: Krzysztof Gibala <krzysztof.gibala@intel.com>
 2022-03-24 12:24:56 +01:00
Filip Hazubski
3eab7009ac Move SCM related WAs logic from CSR to EncodeComputeMode 
This will help with unifying the logic between APIs and GENs.

Related-To: NEO-6728

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2022-03-11 14:00:53 +01:00
Bartosz Dunajski
e24322f266 Debug flag to control MI_ARB_CHECK prefetcher 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2022-03-10 12:50:05 +01:00
Mateusz Jablonski
b697d75695 Correct dimension order in local ids generated for implicit args 
when local ids are generated by HW, use same dim order for runtime generation
move common logic to separated file

Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-02-04 12:46:59 +01:00
Katarzyna Cencelewska
dd63f1d2f9 Add new function append3dStateBtd 
Signed-off-by: Katarzyna Cencelewska <katarzyna.cencelewska@intel.com>
 2022-02-03 14:42:10 +01:00
Maciej Plewka
9d8ce7aace Command container appends BB_END on cmd buffer allocation end 
When linear stream created for command container has not enough space
for command and BB_END it will program BB_END and allocate new command
buffer allocation. Pointer returned from getSpace in this case will
return storage from new command buffer allocation.

Related-To: NEO-5707

Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2022-01-31 16:15:37 +01:00
Maciej Plewka
f8c104feaa Use fw declaration of IndirectHeap in CommandContainer 
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com>
 2022-01-26 13:30:26 +01:00
Mateusz Jablonski
5e238dc7f1 Unify surface state programming logic related to implicit scaling 
OCL image surface state programming for Xe Hp core is now reusing logic
of EncodeSurfaceState helper

Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-25 09:02:28 +01:00
Mateusz Jablonski
fbc0666d1b Move setGrfInfo from HardwareCommandsHelper to EncodeDispatchKernel 
unify grf info programming across APIs

Related-To: NEO-6466
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2022-01-20 15:42:06 +01:00
Zbigniew Zdanowicz
b78bb26cbf Refactor partitioning of state base address 
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-01-14 19:06:24 +01:00
Zbigniew Zdanowicz
9c4f05387b Refactor partitioning of dispatched kernels 
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-01-13 22:54:07 +01:00
Zbigniew Zdanowicz
9785ab7828 Refactor encode dispatch kernel class interface 
Related-To: NEO-6589

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2022-01-13 12:08:38 +01:00
Filip Hazubski
9a450d1b74 Pass hwInfo to appendMiFlushDw 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-22 15:22:47 +01:00
Filip Hazubski
1107fdfe55 Rename function and remove unused parameter 
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-12-08 22:47:40 +01:00
Rafal Maziejuk
d5f3ac37bf Add KernelExecutionType argument to encodeAdditionalWalkerFields method 
Signed-off-by: Rafal Maziejuk <rafal.maziejuk@intel.com>
 2021-12-08 12:00:42 +01:00
Zbigniew Zdanowicz
47dbe359bf Add command encoder for store data command 
Related-To: NEO-6262

Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-12-02 20:56:07 +01:00
Zbigniew Zdanowicz
76b8f6296f Move noop programming to dedicated encoder 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-11-18 10:28:56 +01:00
Zbigniew Zdanowicz
9d56939980 Refactor creation of buffer surface state 1/n 
Signed-off-by: Zbigniew Zdanowicz <zbigniew.zdanowicz@intel.com>
 2021-10-21 13:11:31 +02:00
Mateusz Jablonski
5d2d81b2d1 Use uint64_t instead of void * in indirect dispatch programming 
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-10-06 18:37:36 +02:00
Mateusz Jablonski
92bf4b978a Implement implicit args for indirect dispatch 
Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-10-06 16:10:41 +02:00
Mateusz Jablonski
ae340ff6f5 Add L0 aub tests for indirect dispatch 
Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-10-05 21:05:40 +02:00
Mateusz Jablonski
b891ec2588 Correct cross thread data GPU address in indirect dispatch programming 
Related-To: NEO-5081
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
 2021-10-04 14:59:41 +02:00
Bartosz Dunajski
4ba4c32766 Remove SBA->IOH programming on XE_HP_SDV 
Signed-off-by: Bartosz Dunajski <bartosz.dunajski@intel.com>
 2021-09-29 12:35:43 +02:00
Kamil Kopryk
a924b6a304 Code cleanup - avoid copy 5/n 
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
 2021-09-08 08:59:55 +02:00
Filip Hazubski
55723d0b18 Remove redundant functions 
Remove EncodeStates::adjustStateComputeMode function.
Unify CommandStreamReceiverHw::programComputeMode functions.

Related-To: NEO-5995

Signed-off-by: Filip Hazubski <filip.hazubski@intel.com>
 2021-09-07 16:13:50 +02:00