Mateusz Hoppe
b03f625f03
feature: limit max LWS based on preferred number of workgroups per ss
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- limit max LWS size when SLM and barriers are not used
Related-To: GSD-11112
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2025-05-16 20:28:00 +02:00
Compute-Runtime-Validation
8839d62c79
Revert "performance: use RESOURCE_BARRIER as stalling barrier"
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This reverts commit 2a63853349 .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-05-16 20:19:06 +02:00
Szymon Morek
2a63853349
performance: use RESOURCE_BARRIER as stalling barrier
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Related-To: NEO-14943
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-05-16 14:12:18 +02:00
Szymon Morek
bff8f74de7
refactor: remove unused parameter
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Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-05-15 12:23:27 +02:00
Maciej Plewka
85ed1a15e4
fix: do not allow blit for depth image on arl
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Related-To: NEO-14344
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com >
2025-05-13 15:56:47 +02:00
Compute-Runtime-Validation
7d9399e836
Revert "fix: Abort for blit usage on depth image on ARL"
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This reverts commit a19fa245ab .
Signed-off-by: Compute-Runtime-Validation <compute-runtime-validation@intel.com >
2025-05-10 03:17:50 +02:00
Maciej Plewka
a19fa245ab
fix: Abort for blit usage on depth image on ARL
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Related-To: NEO-14344
Signed-off-by: Maciej Plewka <maciej.plewka@intel.com >
2025-05-09 15:08:39 +02:00
Lukasz Jobczyk
df2c776aab
refactor: Remove unused cmdq round robin engine assign
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-05-09 11:03:57 +02:00
Lukasz Jobczyk
1d1414febc
refactor: remove unused dc flush mitigation
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-05-09 08:26:26 +02:00
Lukasz Jobczyk
d590172b65
refactor: Remove unused events tracker
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-05-08 23:53:47 +02:00
Michal Mrozek
6f4a397cfc
refactor: remove not required parameter
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Signed-off-by: Michal Mrozek <michal.mrozek@intel.com >
2025-05-08 23:13:06 +02:00
Michal Mrozek
52daf63a6f
refactor: remove not needed debug variable
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Signed-off-by: Michal Mrozek <michal.mrozek@intel.com >
2025-05-08 14:29:27 +02:00
Lukasz Jobczyk
62619f9525
refactor: remove unused kernel tunning
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-05-08 14:18:21 +02:00
Filip Hazubski
ba85f7417d
fix: Add debug toggle to disable flush L3 for host usm
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Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2025-05-07 16:57:31 +02:00
Michal Mrozek
8d1e83208b
refactor: remove redundant code
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Signed-off-by: Michal Mrozek <michal.mrozek@intel.com >
2025-05-07 16:41:21 +02:00
Michal Mrozek
afdc04975f
refactor: remove ftrSvm variable
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- it is true on all platforms.
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com >
2025-05-07 16:16:42 +02:00
Mateusz Hoppe
d3b11d1527
fix: correctly patch implicit arg buffer in indirect data
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- use correct size alignment of implicit arg buffer, crossthread data
should start after the buffer without extra padding
Related-To: NEO-14449
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2025-05-06 13:25:11 +02:00
Andrzej Koska
41c0546c45
fix: reset timestamps when userEvent is terminated
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Related-To: NEO-14448
Signed-off-by: Andrzej Koska <andrzej.koska@intel.com >
2025-05-06 10:28:35 +02:00
Igor Venevtsev
42efb3d204
feature: add built-in copy kernels for 1D_BUFFER images
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Resolves: NEO-14782, HSD-18042093957
Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com >
2025-05-01 07:51:32 +02:00
Mateusz Jablonski
523e53c862
fix: passing hw generation of local ids for implicit args patching
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Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2025-04-29 16:28:23 +02:00
Mateusz Hoppe
41efee1e7c
feature: add mode to expose single root device
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- simplify API to expose and use only single root device. Disallow
returning subdevices. This is experimental mode.
Related-To: NEO-14559
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2025-04-25 13:20:56 +02:00
Mateusz Jablonski
27d7b633e4
build: use drm-next headers instead of upstream kernel headers
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pick drm-next uapi headers as of b60301774a8fe6c30b14a95104ec099290a2e904
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2025-04-17 17:13:18 +02:00
Grzegorz Wawiorko
213e34135c
fix: Update CL_DEVICE_LATEST_CONFORMANCE_VERSION_PASSED value
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Signed-off-by: Grzegorz Wawiorko <grzegorz.wawiorko@intel.com >
2025-04-16 12:59:01 +02:00
Szymon Morek
4d60465a9e
fix: don't flush texture cache if not required
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Related-To: NEO-14645
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-04-16 10:38:24 +02:00
Mateusz Jablonski
21f6bb8889
build: update opencl headers to v2024.10.24
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https://github.com/intel/compute-runtime/issues/822
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com >
2025-04-15 10:06:20 +02:00
Jaroslaw Warchulski
3e1aa33924
refactor: cleanup headers
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Related-To: NEO-5548
Signed-off-by: Jaroslaw Warchulski <jaroslaw.warchulski@intel.com >
2025-04-14 14:59:40 +02:00
Kamil Kopryk
dd3d294f87
performance: cache MOCS values
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This change caches the most used MOCS values:
* getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CONST);
* getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER);
* getMOCS(GMM_RESOURCE_USAGE_OCL_BUFFER_CACHELINE_MISALIGNED);
inside gmmHelper class during initialization to avoid repeated
calls of virtual functions, branches and/or gmm lib access.
and adds more readably corresponding getters:
* getL1EnabledMOCS
* getL3EnabledMOCS
* getUncachedMOCS
If force all resources uncached is called,
these 3 cached mocs values are reinitialized
It also changes the order of gmmHelper members, to avoid
not needed padding after addressWidth
and simplifies logic in getMocsIndex function
for xehp and later products.
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com >
2025-04-14 14:12:48 +02:00
Igor Venevtsev
ef52479ce4
feature: add FillImage1dBuffer built-in kernel
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Resolves: NEO-13984, HSD-18041422852
Signed-off-by: Igor Venevtsev <igor.venevtsev@intel.com >
2025-04-10 14:04:13 +02:00
Szymon Morek
73ad369b10
fix: invalidate texture cache before reading from image
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Related-To: NEO-9004
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-04-09 14:01:22 +02:00
Young Jin Yoon
0de024dbf9
refactor: separate post-sync into EncodePostSync
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Created EncodePostSync template struct to organize various post-sync
variables/functions from EncodeDispatchKernel
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com >
2025-04-07 20:06:14 +02:00
Vysochyn, Illia
146a7f7b9b
feature: Add support for BUFFER_SIZE explicit argument
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Related-To: NEO-13972
Signed-off-by: Vysochyn, Illia <illia.vysochyn@intel.com >
2025-04-07 14:15:26 +02:00
Lukasz Jobczyk
8978ea5e5a
performance: Do not create global fence allocation on integrated
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-04-07 11:22:04 +02:00
Szymon Morek
91ff22f255
fix: correctly calculate host ptr size for images
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Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-04-04 17:54:42 +02:00
Mateusz Hoppe
cc308719d8
fix: dump zebin when building program
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- when unpackSingleDeviceBinary is not called zebin should be dumped
if debug key is set
Related-To: NEO-14153
Signed-off-by: Mateusz Hoppe <mateusz.hoppe@intel.com >
2025-04-04 14:06:33 +02:00
Szymon Morek
95e0244f70
fix: properly pass info about 3D image
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Related-To: NEO-14538
It's valid for 3D image to copy 2D region.
Current checks for mip map do not consider that.
This change correctly checks for mip mapped 3D image.
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-04-03 16:33:57 +02:00
Jaroslaw Warchulski
c010d17842
fix: respect compression flag in capability table
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Related-To: NEO-9465
Signed-off-by: Jaroslaw Warchulski <jaroslaw.warchulski@intel.com >
2025-04-03 15:36:55 +02:00
Filip Hazubski
504440fc4d
feature: Add ftrHeaplessMode flag
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Pass hwInfo to isHeaplessModeEnabled and isForceBindlessRequired functions.
Related-To: NEO-14526
Signed-off-by: Filip Hazubski <filip.hazubski@intel.com >
2025-04-02 21:06:05 +02:00
Szymon Morek
8836f6df0b
fix: forward mip map level for 3D images
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Related-To: NEO-14539
1D and 2D images have already mip map level set correctly.
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-04-02 11:46:41 +02:00
Szymon Morek
f1b789cbb1
performance: enable staging for 3d images
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Related-To: NEO-14026
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-04-01 16:32:41 +02:00
Szymon Morek
3010af596e
performance: add infrastructure for staging with 3D images
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Related-To: NEO-14026
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-04-01 15:30:30 +02:00
Lukasz Jobczyk
0a11a96a53
refactor: Add dedicated method to check if any ULLS light enabled
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Signed-off-by: Lukasz Jobczyk <lukasz.jobczyk@intel.com >
2025-03-31 16:36:20 +02:00
Szymon Morek
ead0842763
feature: add L0 API to query kernel argument info
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Related-To: NEO-14358
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-03-27 16:43:33 +01:00
Jack Myers
0aa2c4f0cb
feature: allow removal of heapful code paths
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Related-To: NEO-13007
Signed-off-by: Jack Myers <jack.myers@intel.com >
2025-03-27 01:34:35 +01:00
Damian Tomczak
0243004907
feature: additional checkers to enable feature
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Resolves: NEO-13973
Signed-off-by: Damian Tomczak <damian.tomczak@intel.com >
2025-03-26 18:06:20 +01:00
Wojciech Konior
817c6df46d
fix: unify sources from shared added to dll&tests
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Related-To: NEO-4372
Signed-off-by: Wojciech Konior <wojciech.konior@intel.com >
2025-03-25 16:39:18 +01:00
Szymon Morek
2b340528cf
performance: enable staging read for cl buffers
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Related-To: NEO-14026
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-03-25 15:09:46 +01:00
Szymon Morek
d04ac3d60f
fix: flush caches after filling image
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Related-To: NEO-14454
Signed-off-by: Szymon Morek <szymon.morek@intel.com >
2025-03-25 15:00:54 +01:00
Jaroslaw Warchulski
0650b96999
fix: set proper allocation in MemObj::getMemObjectInfo
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Related-To: NEO-12585
Signed-off-by: Jaroslaw Warchulski <jaroslaw.warchulski@intel.com >
2025-03-24 16:07:35 +01:00
Damian Tomczak
6e05c35878
feature: force stateless for copy buffer
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Related-to: NEO-6075
Signed-off-by: Damian Tomczak <damian.tomczak@intel.com >
2025-03-24 14:29:25 +01:00
Damian Tomczak
b5a5f35339
feature: force stateless for copy buffer rect
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Related-to: NEO-6075
Signed-off-by: Damian Tomczak <damian.tomczak@intel.com >
2025-03-24 14:14:44 +01:00