To use, applications need to set EnableSetPair=1 explicitly.
When disabled, implicit scaling allocations require two IPC handles
to be exchanged with other processes using the zexMemGetIpcHandles
APIs.
When enabled, implicit scaling allocations only require one IPC
handle to be exchanged with other process using the zeMemGetIpcHandle
APIs. This is only available when allocation is imported in a different
device than the one in the exporter.
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
When env variable is set, then copies are always done on CPU.
Change the logic of CPU copy to make sure we lock if targeting device memory.
Related-To: NEO-7564
Signed-off-by: Michal Mrozek <michal.mrozek@intel.com>
Enable resolving dependencies by pipecontrol on same CSR, IOQ on DG2 by
default.
Related-To: NEO-7321
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
we use tag allocation for multiple purposes, therefore we should define
all offsets in one place
Resolves: NEO-7559
Signed-off-by: Mateusz Jablonski <mateusz.jablonski@intel.com>
Observed about 4MB reduction in overall binaries size (directory bin)
when building unit_tests target
with MSVC (Visual Studio 2022 17.3.0 preview 6)
using Debug configuration.
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Previous implementation was missing crucial part.
When ray tracing global buffer argument is passed set
hasRTCalls to true.
Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
Flag ResolveDependenciesViaPipeControls now removes only same csr
dependencies. Still enables pipe controls.
Works through hwInfoConfig method isResolveDependenciesByPipeControlsSupported
Related-To: NEO-7321
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
This to follow specification, which says:
zeMemOpenIpcHandle:
- Multiple calls to this function with the same IPC handle will return
unique pointers.
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
Replace a loop with separate helpers to explicitly show differences
between per-HW-thread allocation types.
Related-To: NEO-7398
Signed-off-by: Maciej Bielski <maciej.bielski@intel.com>
Handle misaligned access when aplying debug relocations in zebin.
Debug relocations entries have offsets which are not of natural
alignment, and need to be specificialy handled.
Signed-off-by: Krystian Chmielewski <krystian.chmielewski@intel.com>
- Enable support for L0 Virtual Memory reservation on Linux and Windows.
- Excludes support for Linux to allow pStart option
Related-To: LOCI-3397, LOCI-1543
Signed-off-by: Spruit, Neil R <neil.r.spruit@intel.com>
If a handle cannot be obtained, like PRIME_HANDLE_TO_FD, then
properly check for the error and propagate it upwards.
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
This AIL allows the Davinci Resolve to use overlapping buffers
outside of the specification
Related-To: NEO-5871
Signed-off-by: Andrzej Koska andrzej.koska@intel.com
