In the systemBarrier function, we check if the driver model is 'unknown'
if it is then return Unsupported Feature and replacing test to accurate
file
Resolves: NEO-16661,NEO-16718
Signed-off-by: Aleksandra Nizio <aleksandra.nizio@intel.com>
With this change, only last seqeuence of event signal->wait from
child to parent graph will be treated as join of a forked cmdlist
Related-To: NEO-16554
Signed-off-by: Chodor, Jaroslaw <jaroslaw.chodor@intel.com>
When blocking free of chunk is requested, wait for pool allocation
completion.
In pool cleanup, make freeing pool non-blocking.
Related-To: NEO-6893
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
Introduce a third ISA allocation strategy for modules where debugger
is disabled but total kernel ISA size exceeds single page size.
Previously such modules would allocate separate ISA per each kernel.
Now they share single per-module allocation (kernelsIsaParentRegion),
reducing memory wastage.
Three allocation paths:
1. debuggerDisabled && size <= pageSize: pool allocator (cross-module)
2. debuggerDisabled && size > pageSize: per-module
3. debugger enabled: per-kernel separate allocations
Related-To: HSD-18043990512
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
1. Use specific version when exposing extension
2. Use _CURRENT enum when verifying extension
3. Reorder and group the extension list
Related-To: NEO-11561
Signed-off-by: Jakub Nowacki <jakub.nowacki@intel.com>
Any alignments below pool alignment can be accepted.
Do not pool if host ptr is passed from application.
Adjust ULTs that previously did not use pooling due to alignment.
Related-To: NEO-16084
Signed-off-by: Dominik Dabek <dominik.dabek@intel.com>
Implemented getDeviceMemoryMaxClkRate() override for BMG Linux to query
actual memory clock rate from DRM driver instead of returning 0.
Updated unit test to dynamically verify maxClockRate matches ProductHelper
return value instead of expecting hardcoded 0.
Related-To: NEO-16805
Signed-off-by: Jack Myers <jack.myers@intel.com>
No Thread remapping is required for this part. Remove all
thread remapping when using xe driver
Related-to: GSD-11702
Signed-off-by: Brandon Yates <brandon.yates@intel.com>
Related-To: GSD-11990
If user releases USM without defer policy, do not check whether
allocation is in use when trying to reuse.
Also, when context is being destroyed, use blocking policy to
make sure that tag is updated and driver will notice that
resource is no longer being used by GPU when cleaning up.
Signed-off-by: Szymon Morek <szymon.morek@intel.com>
Each host function gets its unique ID within a CSR,
uses 1 mi store to write ID - to signal that host function is ready,
and 1 mi semaphore wait will wait for the ID to be cleared,
Use 0th bit from ID as pending/completed flag,
host function ID is incremented by 2, and starts with 1.
So each ID will always have 0bit set.
This is a must have since semaphore wait can wait for 4 bytes only.
Adjust command buffer programming and patching logic to IDs.
Add hostFunction callable class - using invoke method,
which stores required information about callback.
Add host function streamer - stores all host function data
for a given CSR.
All user provided host functions are stored in unordered map,
where key is host function ID.
Add host function scheduler, and a thread pool - under debug flag
Single threaded scheduler loops over all registered host function streamers,
dispatch ready to execute host functions to thread pool.
Allow for out of order host functions execution for OOQ - under debug flag,
each host function has bool isInOrder flag which indicates if it can be
executed Out Of Order - in this mode, ID tag will be cleared immediately,
so semaphore wait will unblock before the host function execution.
Remove Host Function worker CV and atomics based implementation.
Rename classes
Related-To: NEO-14577
Signed-off-by: Kamil Kopryk <kamil.kopryk@intel.com>
Temporarily disable offload test case related to additional blit
properties from the test
Related-To: NEO-13003
Signed-off-by: Young Jin Yoon <young.jin.yoon@intel.com>
Signed-off-by: Bellekallu Rajkiran <bellekallu.rajkiran@intel.com>
When is2MBLocalMemAlignmentEnabled returns true,
increase pool size for builtins from 64k to 2MB.
Additionally, set appropriate alignment for kernel ISA heap allocations.
Additionally, configure isaAllocationPageSize based on productHelper.
Related-To: NEO-12287
Signed-off-by: Fabian Zwoliński <fabian.zwolinski@intel.com>
